X9C102, X9C103, X9C104, X9C503 Data Sheet July 20, 2009 FN8222.3 Digitally Controlled Potentiometer Features (XDCP) Solid-State Potentiometer The X9C102, X9C103, X9C104, X9C503 are Intersils Three-Wire Serial Interface digitally controlled (XDCP) potentiometers. The device 100 Wiper Tap Points consists of a resistor array, wiper switches, a control section, - Wiper Position Stored in Non-volatile Memory and and non-volatile memory. The wiper position is controlled by Recalled on Power-up a three-wire interface. 99 Resistive Elements The potentiometer is implemented by a resistor array - Temperature Compensated composed of 99 resistive elements and a wiper switching network. Between each element and at either end are tap - End-to-End Resistance, 20% points accessible to the wiper terminal. The position of the - Terminal Voltages, 5V wiper element is controlled by the CS, U/D, and INC inputs. Low Power CMOS The position of the wiper can be stored in non-volatile -V = 5V CC memory and then be recalled upon a subsequent power-up - Active Current, 3mA max. operation. - Standby Current, 750A max. The device can be used as a three-terminal potentiometer or High Reliability as a two-terminal variable resistor in a wide variety of applications ranging from control to signal processing to - Endurance, 100,000 Data Changes per Bit parameter adjustment. - Register Data Retention, 100 years Pinout X9C102 = 1k X9C102, X9C103, X9C104, X9C503 X9C103 = 10k (8 LD SOIC, 8 LD PDIP) X9C503 = 50k TOP VIEW X9C104 = 100k INC V 1 8 CC Packages U/D 2 7 CS - 8 Ld SOIC V /R 3 6 V /R L L H H - 8 Ld PDIP V V /R SS W W 4 5 Pb-Free Available (RoHS Compliant) Block Diagram U/D 7-BIT 99 R V H/ H UP/DOWN INC COUNTER CS 98 V (SUPPLY VOLTAGE) CC 97 96 7-BIT V /R H H UP/DOWN (U/D) NON-VOLATILE ONE CONTROL OF MEMORY INCREMENT (INC) R /V AND W W ONE- MEMORY HUNDRED RESISTOR TRANSFER DEVICE (CS) DECODER GATES ARRAY SELECT V /R L L 2 V (GROUND) SS STORE AND 1 RECALL GENERAL CONTROL V CC CIRCUITRY 0 GND R /V L L DETAILED R /V W W CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners.X9C102, X9C103, X9C104, X9C503 Ordering Information PART PART R TEMP RANGE PACKAGE TOTAL NUMBER MARKING (k ) (C) PACKAGE DWG. X9C102P X9C102P 1 0 to +70 8 Ld PDIP MDP0031 X9C102PZ (Notes 1, 2) X9C102P Z 0 to +70 8 Ld PDIP (Pb-free) MDP0031 X9C102PI X9C102P I -40 to +85 8 Ld PDIP MDP0031 X9C102PIZ (Notes 1, 2) X9C102P ZI -40 to +85 8 Ld PDIP (Pb-free) MDP0031 , X9C102S* ** X9C102S 0 to +70 8 Ld SOIC MDP0027 X9C102SZ* (Note 1) X9C102S Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027 , X9C102SI* ** X9C102S I -40 to +85 8 Ld SOIC MDP0027 , X9C102SIZ* ** (Note 1) X9C102S ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027 X9C103P X9C103P 10 0 to +70 8 Ld PDIP MDP0031 X9C103PZ (Notes 1, 2) X9C103P Z 0 to +70 8 Ld PDIP (Pb-free) MDP0031 X9C103PI X9C103P I -40 to +85 8 Ld PDIP MDP0031 X9C103PIZ (Note 1) X9C103P ZI -40 to +85 8 Ld PDIP (Pb-free) MDP0031 , X9C103S* ** X9C103S 0 to +70 8 Ld SOIC MDP0027 , X9C103SZ* ** (Note 1) X9C103S Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027 , X9C103SI* ** X9C103S I -40 to +85 8 Ld SOIC MDP0027 , X9C103SIZ* ** (Note 1) X9C103S ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027 X9C503P X9C503P 50 0 to +70 8 Ld PDIP MDP0031 X9C503PZ (Notes 1, 2) X9C503P Z 0 to +70 8 Ld PDIP (Pb-free) MDP0031 X9C503PI X9C503P I -40 to +85 8 Ld PDIP MDP0031 X9C503PIZ (Notes 1, 2) X9C503P ZI -40 to +85 8 Ld PDIP (Pb-free) MDP0031 X9C503S* X9C503S 0 to +70 8 Ld SOIC MDP0027 X9C503SZ* (Note 1) X9C503S Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027 , X9C503SI* ** X9C503S I -40 to +85 8 Ld SOIC MDP0027 , X9C503SIZ* ** (Note 1) X9C503S ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027 X9C104P X9C104P 100 0 to +70 8 Ld PDIP MDP0031 X9C104PI X9C104P I -40 to +85 8 Ld PDIP MDP0031 X9C104PIZ (Notes 1, 2) X9C104P ZI -40 to +85 8 Ld PDIP (Pb-free) MDP0031 , X9C104S* ** X9C104S 0 to +70 8 Ld SOIC MDP0027 , X9C104SZ* ** (Note 1) X9C104S Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027 , X9C104SI* ** X9C104S I -40 to +85 8 Ld SOIC MDP0027 , X9C104SIZ* ** (Note 1) X9C104S ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027 *Add T1 suffix for tape and reel. Please refer to TB347 for details on reel specifications. **Add T2 suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Pb-free PDIPs can be used for through-hole wave solder processing only. They are not intended for use in Reflow solder processing applications. FN8222.3 2 July 20, 2009