EF-DI-DPD-SITE Xilinx

LogiCORE IP Digital Pre-Distortion v9.0 PB006 (v9.0) January 29, 2018 LogiCORE IP Product Brief Introduction The LogiCORE IP Digital Pre-Distortion (DPD) IP negates the non-linear effects of a power amplifier (PA) when transmitting a wide-band signal. DPD allows a PA to achieve greater efficiency by operating at a higher output power while maintaining spectral compliance, and reducing system capital and operational expenditure. Additional Documentation A full product guide is available for this core. Access to this material can be requested by clicking on this registration link: LogiCORE IP Digital Pre-Distortion v9.0 IP Facts LogiCORE IP Facts Table Core Specifics 1 Supported Device Family Zynq -7000, Zynq UltraScale+, and Zynq UltraScale+ RFSoC Supported User Interfaces AXI4, AXI4-Lite, and AXI4-Stream Resources See the Digital Pre-Distortion v9.0 Product Guide Provided with Core Design Files Local Vivado repository Example Design Not Provided Test Bench Test bench is provided. See Test Bench section in Digital Pre-Distortion v9.0 Product Guide (PG076) for more details. (registration required) Constraints File See Constraining the Core section in Digital Pre-Distortion v9.0 Product Guide (PG076) for more details. (registration required) Simulation Model Not Provided Supported S/W Driver Executable and linkable format files are now packaged along with the DFE Subsystem Reference Design which need to be downloaded separately. 2 Tested Design Flows Design Entry Vivado Design Suite 2018.3 Simulation Supported. See Test Bench section in Digital Pre-Distortion v9.0 Product Guide (PG076) for more details. (registration required) Synthesis Vivado Synthesis Support Provided by Xilinx at the Xilinx Support web page Notes: 1. For a complete list of supported devices, see the Vivado IP catalog. 2. For the supported versions of the tools, see the Xilinx Design Tools: Release Notes Guide. Technical Support Xilinx provides technical support on the Xilinx Community Forums for this LogiCORE IP product when used as described in the product documentation. Xilinx cannot guarantee timing, functionality, or support if you do any of the following: Implement the solution in devices that are not defined in the documentation. Customize the solution beyond that allowed in the product documentation. Change any section of the design labeled DO NOT MODIFY. To ask questions, navigate to the Xilinx Community Forums. PB006 (v9.0) January 29, 2018 www.xilinx.com Send Feedback LogiCORE IP Digital Pre-Distortion v9.0 2