eZ80Acclaim Flash Microcontrollers eZ80F91 MCU Product Brief PB013507-0412 2 Inter-integrated circuit (IC) and serial Product Block Diagram peripheral interface (SPI) with independent clock rate generator eZ80F91 MCU Four counter/timers with prescalers supporting 256 KB Flash + event counting, input capture, output compare, 32-Bit GPIO 512 B Flash and Pulse Width Modulator (PWM) modes 10/100 Mbps Watchdog Timer (WDT) with internal RC 8 KB SRAM Ethernet MAC clocking option 8 KB Frame Buffer Real time clock (RTC) with on-chip 32 KHz oscillator, selectable 50/60 Hz input, and sepa- Infrared 2 rate RTC V pin for battery backup Encoder/ 2 UART I C SPI DD Decoder Glueless external memory interface with 4 Chip-Selects/Wait-State Generators and Real Time 4 PRT WDT external WAIT input pin. It also supports Intel Clock and Motorola buses 4 CS JTAG and Zilog Debug Interface (ZDI) sup- JTAG ZDI PLL + WSG porting emulation features Low-power PLL and on-chip oscillator Programmable-priority vectored interrupts, Key Features non-maskable interrupts, and interrupt controller The eZ80F91 MCU is a member of Zilogs eZ80Acclaim product family, which offers on- New DMA-like eZ80 CPU instructions chip Flash versions of Zilogs eZ80 processor Power management features supporting core. The eZ80F91 MCU offers the following HALT/SLEEP modes and selective peripheral features: power-down controls 50 MHz high-performance eZ80 CPU 144-pin BGA package or 144-pin LQFP 256 KB Flash Program Memory and extra 512 package B device configuration Flash Memory 3.0 V to 3.6 V supply voltage with 5 V-tolerant 32 bits of General-Purpose Input/Output (GPIO) inputs 16 KB total on-chip high-speed SRAM: Operating temperature ranges: 8 KB for general-purpose use Standard, 0C to +70C 8 KB for 10/100 BaseT Ethernet Media Extended, 40C to +105C Access Controller (EMAC) high-speed frame buffer General Description IrDA-compatible infrared encoder/decoder The eZ80F91 MCU is industrys first MCU Two universal asynchronous receiver/ featuring a high-performance 8-bit microcontroller transmitter (UARTs) with independent baud with an integrated 10/100 BaseT EMAC. It is a rate generators power-efficient, optimized pipeline architecture Copyright 2010 by ZiLOG, Inc. All rights reserved. www.zilog.comeZ80F91 MCU Product Brief 2 microcontroller with a maximum operating speed of following I/O modes: input, output, open drain, 50 MHz. Offering on-chip Flash Memory, SRAM, open source, level-triggered interrupts (High or Ethernet MAC, and rich peripherals, the eZ80F91 is Low), edge-triggered interrupts (High or Low), well-suited for industrial, communication, automa- dual edge-triggered interrupts, and alternate tion, security, and embedded Internet applications. function. Eight of the output pins can drive 10 mA each (Port A), while 16 other pins feature Schmitt-trigger input buffers (Port B and Port C). eZ80 CPU Core The eZ80 CPU operates either in Z80-compatible 10/100 BaseT Ethernet MAC (64 KB) mode or full 24-bit (16 MB) addressing The eZ80F91 MCU features an integrated IEEE mode. Considering both the increased clock speed 802.3 Ethernet controller with 8 KB of and processor efficiency, the processing power of dynamically-configurable Tx/Rx frame buffer. It the eZ80 CPU competes with the performance of supports speed of 10 Mbps and 100 Mbps, full 16-bit microprocessors. The eZ80 improves on the duplex operation, and an industry-standard Media world-famous Z80 architecture. Like the Z80, the , Independent Interface (MII) for simple connection eZ80 CPU features dual bank registers for fast con- to an external Physical Layer interface (PHY) text switching. device. The eZ80F91 MCU delivers high perfor- mance and overall cost effectiveness as an embed- eZ80F91 MCU Peripherals ded network microcontroller. Description High performance is achieved by optimizing the The eZ80F91 MCU includes the following periph- internal bus design of the eZ80 CPU with shared eral elements: memories, dedicated Ethernet Tx/Rx DMAs, and Tx/Rx FIFOs. This bus design provides the highest On-Chip Memory data throughput over the Ethernet interface, yet The eZ80F91 device offers 256 KB of Flash requires minimum eZ80 CPU intervention and Program Memory. A separate page of 512 bytes minimizes system loading. Flash memory is available for general device configuration data. Other on-chip memory features Infrared Encoder/Decoder include: Supports IrDA SIR format Single power supply operation Operates seamlessly with on-chip UART Page erase feature: 2048 bytes/page Interfaces with IrDA-compliant transceivers Fast page erase and byte program operation Supports transmit/receive to 115 Kbps 78 ns minimum read cycle Universal Asynchronous Receiver/ Endurance: 10,000 write cycles (typical) Transmitter Data can be retained for more than 100 years at Each of the two UART channels contains a room temperature transmitter, a receiver, control logic/registers, and In addition, 16 KB of high-speed, relocatable a Baud Rate Generator (BRG). SRAM is available, of which 8 KB is for general- The BRG produces a lower-frequency bit clock purpose use. Another 8 KB of SRAM is used by the from the system clock. All standard baud rates EMAC for Ethernet operation, but is also user- up to 115 Kbps (and higher) are supported. accessible when Ethernet functionality is not The UART module implements the logic required. required to support asynchronous communica- tions, hardware flow control, and 9-bit charac- General-Purpose Input/Output ter format. The module also contains separate There are 32 bits of GPIO. All GPIO pins are 16-byte-deep transmit and receive FIFOs. individually programmable and support the PB013507-0412 eZ80Acclaim Flash Microcontrollers