Z80181 Zilog SMART ACCESS CONTROLLER SAC PRELIMINARY PRODUCT SPECIFICATION Z80181 SMART ACCESS CONTROLLER (SAC ) FEATURES n Z80180 Compatible MPU Core with 1 Channel of n Z180 Compatible MPU Core Includes: Z85C30 SCC, Z80 CTC, Two 8-Bit General-Purpose - Enhanced Z80 CPU Core Parallel Ports, and Two Chip Select Signals. - Memory Management Unit (MMU) Enables Access to 1MB of Memory n High Speed Operation (10 MHz) - Two Asynchronous Channels - Two DMA Channels n Low Power Consumption in Two Operating Modes: - Two 16-Bit Timers - (TBD) mA Typ. (Run Mode) - Clocked Serial I/O Port - (TBD) mA Typ. (STOP Mode) n On-Board Z84C30 CTC n Wide Operational Voltage Range (5V 10%) n Two 8-Bit General-Purpose Parallel Ports n TTL/CMOS Compatible n Memory Configurable RAM and ROM Chip Select Pins n Clock Generator n 100-Pin QFP Package n One Channel of Z85C30 Serial Communication Controller (SCC) GENERAL DESCRIPTION The Z80181 SAC Smart Access Controller (hereinafter, Information on enhancement/cost reductions of existing referred to as Z181 SAC) is a sophisticated 8-bit CMOS hardware using Z80/Z180 with Z8530/Z85C30 applica- microprocessor that combines a Z180-compatible MPU tions is also included in this product specification. (Z181 MPU), one channel of Z85C30 Serial Communica- Notes: tion Controller (SCC), a Z80 CTC, two 8-bit general-pur- All Signals with a preceding front slash,, are active Low, e.g., pose parallel ports, and two chip select signals, into a B//W (WORD is active Low) /B/W (BYTE is active Low, only). single 100-pin Quad Flat Pack (QFP) package (Figures 1 and 2). Created using Zilog s patented Superintegration Power connections follow conventional descriptions below: methodology of combining proprietary IC cores and cells, this high-end intelligent peripheral controller is well-suited Connection Circuit Device for a broad range of intelligent communication control Power V V CC DD applications such as terminals, printers, modems, and Ground GND V SS slave communication processors for 8-, 16- and 32- bit MPU based systems. 2-1 DS971800500Z80181 Zilog SMART ACCESS CONTROLLER SAC GENERAL DESCRIPTION (Continued) D7-D0 Tx Data Z80180 SCC Compatible Control Rx Data (1 Channel) Core A19-A0 Modem/Control 8 Signals CTC Glue Logic A19-A12 Address PIA1 Bit Programmable /ROMCS Decode 8 Bi-directional I/O Logic or I/O Pins of CTC /RAMCS PIA2 Bit Programmable Bi-directional I/O 8 Z80181 = Z180 + SCC/2 + CTC + PIA Figure 1. Z80181 Functional Block Diagram 2-2 DS971800500