Product Update UP003802-0703 Errata to Z8E000/Z8E001 Silicon Introduction This Product Update lists precautions regarding the T and T VAL functions of the OUT X Z8E000 and Z8E001 microcontrollers. Related Documentation Z8E000 Product Specication (DS0036) Z8E001 Product Specication (DS0011) T Precaution OUT The T function uses the PTBOUT register bit 1 directly by XORing it on each occur- OUT rence of an interrupt. The PWM reload is not based on the resulting value. The observed functioning can be described as: following Reset, the T special function OUT is selected and the PWM is started. The timer decrements from the value in the counter. Upon the rst time-out, the T pin ips and the Low-side reload value is loaded into the OUT counter. The counter alternates from this point forward, depending on which reload pair it uses. If the PB1 pin is in the Low output state when the T special function is enabled, OUT then the PWM is upside-down from the beginning. If it is High, then the PWM is correct. If software modies the PB1 output state, the pin changes states to reect the software- driven value, even though the pin is in the T special function mode. If the programmer OUT does not intentionally modify the bit and instead uses the Boolean operators on the PTBOUT register, the timer ips if the software Read-Modify-Write operation happens to fall with a timer time-out in the middle. Because the timer and the CPU are running at dif- ferent divisors of the master clock, this occurrence is not uncommon. The software write- back overrides the hardware change and the T pin does not change state as it should OUT have. Because there is no feedback mechanism, this lack of state change causes the PWM reload selection to be inverted from the PWM output state. T VAL Precaution x There is a bug in the chip that causes the hardware write-back of the timers to corrupt the software Write into the count value registers. The timer value registers should not be writ- ten by software unless the timer is stopped. Otherwise, the timer will not time-out during the instruction ZiLOG Worldwide Headquarters 532 Race Street San Jose, CA 95126-3432 Telephone: 408.558.8500 Fax: 408.558.8300 www.zilog.com Information Integrity The information contained within this document has been veried according to the general princi- ples of electrical and mechanical engineering. Any applicable source code illustrated in the docu- ment was either written by an authorized ZiLOG employee or licensed consultant. Permission to use these codes in any form besides the intended application, must be approved through a license agreement between both parties. ZiLOG will not be responsible for any code(s) used beyond the intended application. Contact your local ZiLOG Sales Ofce to obtain necessary license agree- ments. Document Disclaimer ZiLOG is a registered trademark of ZiLOG Inc. in the United States and in other countries. All other products and/or service names mentioned herein may be trademarks of the companies with which they are associated. 2003 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROP- ERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Except with the express written approval of ZiLOG, use of information, devices, or technology as critical compo- nents of life support systems is not authorized. No licenses are conveyed, implicitly or otherwise, by this document under any intellectual property rights. ZiLOG Worldwide Headquarters 532 Race Street San Jose, CA 95126-3432 Telephone: 408.558.8500 Fax: 408.558.8300 www.zilog.com