AS4C2M32S
2M x 32 bit Synchronous DRAM (SDRAM)
Confidential (Rev. 3.0, May. /2014)
Features Overview
Fast access time: 5.5/5.5 ns
The 64Mb SDRAM is a high-speed CMOS
Fast Clock rate: 200/166/143 MHz
synchronous DRAM containing 64 Mbits. It is
internally configured as a quad 512K x 32 DRAM with
Fully synchronous operation
a synchronous interface (all signals are registered on
Internal pipelined architecture
the positive edge of the clock signal, CLK). Each of
Four internal banks (512K x 32bit x 4bank)
the 512K x 32 bit banks is organized as 2048 rows by
Programmable Mode
256 columns by 32 bits. Read and write accesses to
- CAS Latency: 2 or 3
the SDRAM are burst oriented; accesses start at a
- Burst Length: 1, 2, 4, 8, or full page
selected location and continue for a programmed
number of locations in a programmed sequence.
- Burst Type: Sequential or Interleaved
Accesses begin with the registration of a
- Burst-Read-Single-Write
BankActivate command which is then followed by a
Burst stop function
Read or Write command.
Individual byte controlled by DQM0-3
The SDRAM provides for programmable Read or
Auto Refresh and Self Refresh
Write burst lengths of 1, 2, 4, 8, or full page, with a
Operating temperature range
burst termination option. An auto precharge function
- Commercial (0 ~ 70C)
may be enabled to provide a self-timed row
- Industrial (-40 ~ 85C)
precharge that is initiated at the end of the burst
4096 refresh cycles/64ms
sequence. The refresh functions, either Auto or Self
Single +3.3V 0.3V power supply Refresh are easy to use.
Interface: LVTTL
By having a programmable mode register, the
86-pin 400 x 875 mil plastic TSOP II system can choose the most suitable modes to
package, 0.50mm pin pitch
maximize its performance. These devices are well suited
for applications requiring high memory bandwidth.
- Pb and Halogen Free
Table 1. Key Specifications
AS4C2M32S -5/6/7
tCK3 Clock Cycle time(min.) 5/6/ ns
tAC3 Access time from CLK (max.) 5.5/5.5 ns
tRAS Row Active time(min.) 42/49 ns
tRC Row Cycle time(min.) 60/70 ns
Table 2.Ordering Information
Part Number Frequency Package Temperature Temp Range
AS4C2M32S-6TIN 166MHz 86-pin TSOP II Industrial -40 ~ 85C
AS4C2M32S-6TCN 166MHz 86-pin TSOP II Commercial 0 ~ 70C
AS4C2M32S-7TCN 143MHz 86-pin TSOP II Commercial 0 ~ 70C
AS4C2M32S-5TCN 200MHz 86-pin TSOPII Commercial 0 ~ 70C
T: indicates TSOP II package
N: indicates Pb and Halogen Free
Confidential 1 Rev. 3.0 May. /2014 AS4C2M32S
Figure 1. Pin Assignment (Top View)
VDD 1 86 VSS
2 85
DQ0 DQ15
VDDQ 3 84 VSSQ
DQ1 4 83 DQ14
DQ2 5 82 DQ13
VSSQ 6 81 VDDQ
DQ3 7 80 DQ12
DQ4 8 79 DQ11
VDDQ 9 78 VSSQ
DQ5 10 77 DQ10
DQ6 11 76 DQ9
VSSQ 12 75 VDDQ
13 74
DQ7 DQ8
NC 14 73 NC
VDD 15 72 VSS
16 71
DQM0 DQM1
WE# 17 70 NC
18 69
CAS# NC
RAS# 19 68 CLK
CS# 20 67 CKE
21 66
NC A9
BA0 22 65 A8
BA1 23 64 A7
A10/AP 24 63 A6
A0 25 62 A5
A1 26 61 A4
A2 27 60 A3
DQM2 28 59 DQM3
VDD 29 58 VSS
NC 30 57 NC
DQ16 31 56 DQ31
32 55
VSSQ VDDQ
DQ17 33 54 DQ30
DQ18 34 53 DQ29
35 52
VDDQ VSSQ
DQ19 36 51 DQ28
DQ20 37 50 DQ27
VSSQ 38 49 VDDQ
DQ21 39 48 DQ26
DQ22 40 47 DQ25
VDDQ 41 46 VSSQ
DQ23 42 45 DQ24
VDD 43 44 VSS
Confidential 2 Rev. 3.0 May. /2014