AS4C32M16MD1A-5BCN Alliance Memory

AS4C32M16MD1A-5BCN Revision History 512Mb AS4C32M16MD1A - 60 ball FBGA PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet Dec 2015 Rev 1.1 Removed industrial temperature May 2016 Rev 1.2 Adjust the temperature information July 2016 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1/56 - Rev.1.2 July 2016AS4C32M16MD1A-5BCN 1. GENERAL DESCRIPTION This AS4C32M16MD1A-5BCN is 536,870,912 bits synchronous double data rate Dynamic RAM. Each 134,217,728 bits bank is organized as 8,192 rows by 1024 columns by 16 bits fabricated with Alliance Memorys high performance CMOS technology. This device uses a double data rate architecture to achieve high- speed operation. The double data rate architecture is essentially a 2n- prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O balls. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications. 2. FEATURES CAS Latency: 2 and 3 VDD/VDDQ = 1.7~1.95V Burst Length: 2, 4, 8 and 16 Data width: x16 Burst Type: Sequential or Interleave Clock rate: 200MHz 64 ms Refresh period Partial Array Self-Refresh(PASR) Interface: LVCMOS Auto Temperature Compensated Self-Refresh(ATCSR) Operating Temperature Range Power Down Mode Extended (-30C to +85C) Deep Power Down Mode (DPD Mode) Programmable output buffer driver strength Four internal banks for concurrent operation Data mask (DM) for write data Clock Stop capability during idle periods Auto Pre-charge option for each burst access Double data rate for data output Differential clock inputs (CK and CK ) Bidirectional, data strobe (DQS) PKG Type x16 : 8.0 x 9.0mm 60 Ball FPBGA (Fine Pitch Ball Grid Array) Table 1. Speed Grade Information Speed Grade Clock Frequency CAS Latency t (ns) t (ns) RCD RP 200MHz 3 15 15 DDR 1-400 Table 2. Ordering Information Product part No Org Temperature Max Clock (MHz) Package 200 AS4C32M16M D1A-5BCN Extended -30C to +85C 60-ball FPBGA 32Mx 16 Confidential - 2/56 - Rev.1.2 July 2016