AS4C4M16SA-Automotive
64M (4M x 16 bit) Synchronous DRAM (SDRAM)
Confidential Advanced (Rev. 1.0- 63nm, Mar. /2014)
Features Overview
Fast access time from clock: 5.4 ns The 64Mb SDRAM is a high-speed CMOS
synchronous DRAM containing 64 Mbits. It is internally
Fast clock rate: 166 MHz
configured as 4 Banks of 1M word x 16 DRAM with a
Fully synchronous operation
synchronous interface (all signals are registered on
AEC-Q100 Compliant
the positive edge of the clock signal, CLK). Read and
Internal pipelined architecture
write accesses to the SDRAM are burst oriented;
1M word x 16-bit x 4-bank
accesses start at a selected location and continue for
Programmable Mode registers
a programmed number of locations in a programmed
- CAS Latency: 2 or 3 sequence. Accesses begin with the registration of a
Bank Activate command which is then followed by a
- Burst Length: 1, 2, 4, 8, or full page
Read or Write command.
- Burst Type: Sequential or Interleaved
The SDRAM provides for programmable Read or
- Burst stop function
Write burst lengths of 1, 2, 4, 8, or full page, with a
- Optional drive strength control
burst termination option. An auto precharge function
Auto Refresh and Self Refresh
may be enabled to provide a self-timed row precharge
4096 refresh cycles/32ms
that is initiated at the end of the burst sequence. The
Automotive Ambient Temperature: -40~105C
refresh functions, either Auto or Self Refresh are easy
CKE power down mode
to use. By having a programmable mode register, the
system can choose the most suitable modes to
Single +3.3V 0.3V power supply
maximize its performance. These devices are well
Interface: LVTTL
suited for applications requiring high memory
54-pin 400 mil plastic TSOP II package
bandwidth and particularly well suited to high
54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package
performance PC applications.
- All parts ROHS Compliant
Table 1. Key Specifications
AS4C4M16SA -6
tCK3 Clock Cycle time(min.) 6 ns
tAC3 Access time from CLK (max.) 5.4 ns
tRAS Row Active time(min.) 42ns
tRC Row Cycle time(min.) 60ns
Table 2.Ordering Information
Part Number Frequency Package Temperature Temp Range
AS4C4M16SA-6BAN 166MHz 54-Ball FBGA Industrial -40 ~ 105C
AS4C4M16SA-6TAN 166MHz 54-Pin TSOPII Industrial -40 ~ 105C
B: indicates FBGA package T: indicates TSOP II package
N: indicates Pb and Halogen Free
Confidential 1 Rev. 1.0-63nm Mar. /2014 AS4C4M16SA - Automotive
Figure 1. Pin Assignment (Top View)
VDD 1 54 VSS
DQ0 2 53 DQ15
VDDQ 3 52 VSSQ
DQ1 4 51 DQ14
DQ2 5 50 DQ13
VSSQ 6 49 VDDQ
DQ3 7 48 DQ12
DQ4 8 47 DQ11
9 46
VDDQ VSSQ
DQ5 10 45 DQ10
DQ6 11 44 DQ9
VSSQ 12 43 VDDQ
DQ7 13 42 DQ8
VDD 14 41 VSS
15 40
LDQM NC/RFU
WE# 16 39 UDQM
CAS# 17 38 CLK
RAS# 18 37 CKE
CS# 19 36 NC
BA0 20 35 A11
21 34
BA1 A9
A10/AP 22 33 A8
A0 23 32 A7
A1 24 31 A6
A2 25 30 A5
A3 26 29 A4
27 28
VDD VSS
Figure 1.1 Ball Assignment (Top View)
1 2 3 7 8 9
VSS DQ15 VSSQ VDDQ DQ0 VDD
A
DQ14 DQ13 VDDQ VSSQ DQ2 DQ1
B
DQ12 DQ11 VSSQ VDDQ DQ4 DQ3
C
DQ10 DQ9 VDDQ VSSQ DQ6 DQ5
D
DQ8 NC VSS VDD LDQM DQ7
E
UDQM CLK CKE CAS# RAS# WE#
F
NC A11 A9 BA0 BA1 CS#
G
A 8 A7 A6 A 0 A1 A10
H
VSS A5 A4 A3 A2 VDD
J
Confidential 2 Rev. 1.0-63nm Mar. /2014