AS4C4M16SA-Automotive Revision History Revision Details Date Rev 1.0 Preliminary datasheet March 2014 Rev 2.0 Add 143MHZ parts. February 2015 Rev 3.0 1. Remove AS4C4M16SA-7BAN, AS4C4M16SA-7TAN parts. March 2015 2. Add part number system on the last page. Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice. Confidential 0 Rev. 3.0 Mar. /2015 AS4C4M16SA-Automotive 64M (4M x 16 bit) Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 3.0, Mar. /2015) Features Overview Fast access time from clock: 5.4 ns The 64Mb SDRAM is a high-speed CMOS synchronous DRAM containing 64 Mbits. It is internally Fast clock rate: 166 MHz configured as 4 Banks of 1M word x 16 DRAM with a Fully synchronous operation synchronous interface (all signals are registered on AEC-Q100 Compliant the positive edge of the clock signal, CLK). Read and Internal pipelined architecture write accesses to the SDRAM are burst oriented 1M word x 16-bit x 4-bank accesses start at a selected location and continue for Programmable Mode registers a programmed number of locations in a programmed - CAS Latency: 2 or 3 sequence. Accesses begin with the registration of a Bank Activate command which is then followed by a - Burst Length: 1, 2, 4, 8, or full page Read or Write command. - Burst Type: Sequential or Interleaved The SDRAM provides for programmable Read or - Burst stop function Write burst lengths of 1, 2, 4, 8, or full page, with a - Optional drive strength control burst termination option. An auto precharge function Auto Refresh and Self Refresh may be enabled to provide a self-timed row precharge 4096 refresh cycles/32ms that is initiated at the end of the burst sequence. The Automotive Ambient Temperature: -40~105 refresh functions, either Auto or Self Refresh are easy CKE power down mode to use. By having a programmable mode register, the Single +3.3V 0.3V power supply system can choose the most suitable modes to maximize its performance. These devices are well Interface: LVTTL suited for applications requiring high memory 54-pin 400 mil plastic TSOP II package bandwidth and particularly well suited to high - Pb and Halogen Free performance PC applications. 54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package - Pb free and Halogen free Table 1. Key Specifications AS4C4M16SA-Automotive -6 tCK3 Clock Cycle time(min.) 6 ns tAC3 Access time from CLK (max.) 5.4 ns tRAS Row Active time(min.) 42 ns tRC Row Cycle time(min.) 60 ns Table 2.Ordering Information Part Number Frequency Package Temperature Temp Range AS4C4M16SA-6BAN 166MHz 54-Ball FBGA Automotive -40~105 AS4C4M16SA-6TAN 166MHz 54-Pin TSOPII Automotive -40~105 B: indicates FBGA package T: indicates TSOP II package A: Automotive N: indicates Pb and Halogen Free Confidential 1 Rev. 3.0 Mar. /2015