AS4C64M16MD1 Revision History AS4C64M16MD1- 60-ball FBGA PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet Darch 201 4 Rev 2.0 Add -5 speed grade part number August 2017 O O L D Q F H 0 H P R U , Q F 7 D O R U : D 6 D Q & D U O R V & 7 ( / ) O O L D Q F H 0 H P R U , Q F U H V H U Y H V W K H U L J K W W R F K D Q J H S U R G X F W V R U V S H F L I L F D W L R Q Z L W K R X W Q R W L F H Confidential -1- Rev.2.0 Aug 2017AS4C64M16MD1 1 Gb (64M x 16 bit) 1.8v High Performance Mobile DDR SDRAM Features Description - 4 banks x 16M x 16 organization The AS4C64M16MD1 is a four bank mobile DDR - Data Mask for Write Control (DM) DRAM organized as 4 banks x 16M x 16. It - Four Banks controlled by BA0 & BA1 achieves high speed data transfer rates by - Programmable CAS Latency: 2, 3 employing a chip architecture that prefetches - Programmable Wrap Sequence: Sequential multiple bits and then synchronizes the output data or Interleave to a system clock. - Programmable Burst Length: All of the control, address, circuits is synchronized 2, 4, 8 or 16 for Sequential Type with the positive edge of an externally sup- plied 2, 4, 8 or 16 for Interleave Type clock. I/O transactions are possible on both edges - Automatic and Controlled Precharge Command of DQS. - Power Down Mode Operating the four memory banks in an - Auto Refresh and Self Refresh interleaved fashion allows random access - Refresh Interval: 8192 cycles/64ms operation to occur at a higher rate than is possible - Double Data Rate (DDR) with standard DRAMs. A sequential and gapless - Bidirectional Data Strobe (DQS) for input and data rate is possible depending on burst length, output data, active on both edges CAS latency and speed grade of the device. - Differential clock inputs CLK and /CLK - Power Supply 1.7V - 1.95V Additionally, the device supports low power saving - Drive Strength (DS) Option: Full, 1/2, 1/4, 1/8 features like PASR, Auto-TCSR, DPD as well as - Auto Temperature-Compensated Self Refresh options for different drive strength. Its ideally suit- (Auto TCSR) able for mobile application. - Partial-Array Self Refresh (PASR) Option: Full, 1/2, 1/4, 1/8, 1/16 -6 -5 - Deep Power Down (DPD) mode Unit - Operating Temperature Range 166 MHz System Frequency (f ) 200 MHz MHz CK Extended -25C to 85C 6 Clock Cycle Time (t ) 5 ns CK3 Industrial -40C to 85C - 60 ball FPBGA package 5 Output data access Time 5 ns ALL PRODUCTS ROHS COMPLIANT Table 1. Speed Grade Information Speed Grade Data rate Clock Frequency CAS Latency t t (ns) (ns) RCD RP 400Mbps (max) 200 MHz (max) 3 15 15 333Mbps (max) 166 MHz (max) 3 18 18 Table 2 Ordering Information for ROHS Compliant Products Max Clock Product part No Org Temperature Package (MHz) AS4C64M16MD1-5BCN 64M x 16 Commercial - 25C to 85C 200 MHz 60-ball FBGA 200 MHz AS4C64M16MD1-5BIN 64M x 16 Industrial -40C to 85C 60-ball FBGA AS4C64M16MD1- 6BCN 64M x 16 Commercial - 25C to 85C 166 MHz 60-ball FBGA AS4C64M16MD1- 6BIN 64M x 16 Industrial -40C to 85C 166 MHz 60-ball FBGA Confidential -2- Rev.2.0 Aug 2017