AS4C64M4SA-7TCN AS4C64M4SA-6TIN Revision History 256M AS4C 64M4SA 54-pin TSOPII PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet Jun. 2017 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 55 - Rev.1.0 June 2017AS4C64M4SA-7TCN AS4C64M4SA-6TIN 64M x 4 bit Synchronous DRAM (SDRAM) Advance (Rev. 1.0, Jun. /2017) Features Overview The AS4C64M4SA SDRAM is a high-speed Fast access time from clock: 5/5.4 ns CMOS synchronous DRAM containing 256 Mbits. It Fast clock rate: 166/143 MHz is internally configured as 4 Banks of 16M word x 4 Fully synchronous operation DRAM with a synchronous interface (all signals are Internal pipelined architecture registered on the positive edge of the clock signal, 16M word x 4-bit x 4-bank CLK). Read and write accesses to the SDRAM are Programmable Mode registers burst oriented accesses start at a selected location - CAS Latency: 2 or 3 and continue for a programmed number of locations - Burst Length: 1, 2, 4, 8, or full page in a programmed sequence. Accesses begin with the registration of a Bank Activate command which is - Burst Type: Sequential or Interleaved then followed by a Read or Write command. - Burst stop function Auto Refresh and Self Refresh The AS4C64M4SA provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, 8192 refresh cycles/64ms with a burst termination option. An auto precharge CKE power down mode function may be enabled to provide a self-timed row Single +3.3V 0.3V power supply precharge that is initiated at the end of the burst Operating Temperature: sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable Commercial: T = 0~70C A mode register, the system can choose the most Industrial: T = -40~85C A suitable modes to maximize its performance. These Interface: LVTTL devices are well suited for applications requiring high 54-pin 400 mil plastic TSOP II package memory bandwidth and particularly well suited to - Pb free and Halogen free high performance PC applications. Table 1. Ordering Information Part Number Org MaxClock (MHz) Package Temperature AS4C64M4SA-7TCN Commercial 0C to +70C 143 MHz 64Mx4 54-pin TSOPII AS4C64M4SA-6TIN 166 MHz 64Mx4 Industrial -40C to +85C 54-pin TSOPII Table 2. Key Specifications -6 AS4C 64 M 4 SA -7 Unit 6 7 ns tCK3 Clock Cycle time(min.) 5 5.4 ns tAC3 Access time from CLK (max.) 42 42 ns tRAS Row Active time(min.) 60 63 ns tRC Row Cycle time(min.) Confidential - 2 of 55 - Rev.1.0 June 2017