Dual Channel, 12-Bit 105 MSPS IF Sampling A/D Converter with Analog Input a Signal Conditioning AD10200 FEATURES includes two wide-dynamic range ADCs. Each ADC has a Dual, 105 MSPS Minimum Sample Rate transformer coupled front-end optimized for Direct-IF sampling. Channel-Channel Isolation, >80 dB The AD10200 has on-chip track-and-hold circuitry, and utilizes AC-Coupled Signal Conditioning Included an innovative architecture to achieve 12-bit, 105 MSPS perfor- Gain Flatness up to Nyquist: < 0.2 dB mance. The AD10200 uses innovative high-density circuit Input VSWR 1.1:1 to Nyquist design to achieve exceptional matching and performance while 80 dB Spurious-Free Dynamic Range still maintaining excellent isolation, and providing for significant Twos Complement Output Format board area savings. 3.3 V or 5 V CMOS-Compatible Output Levels The AD10200 operates with 5.0 V supply for the analog-to- 0.850 W per Channel digital conversion. Each channel is completely independent Industrial and Military Grade allowing operation with independent encode and analog inputs. The AD10200 is packaged in a 68-lead ceramic chip carrier APPLICATIONS package. Manufacturing is done on Analog Devices, Inc. MIL- Radar IF Receivers 38534 Qualified Manufacturers Line (QML) and components Phased Array Receivers are available up to Class-H (5 0C to +125C). Communications Receivers Secure Communications PRODUCT HIGHLIGHTS GPS Antijamming Receivers 1. Guaranteed sample rate of 105 MSPS. Multichannel, Multimode Receivers 2. Input signal conditioning with full power bandwidth to PRODUCT DESCRIPTION 250 MHz. The AD10200 is a full channel ADC solution with on-module 3. Fully tested/characterized performance at 121 MHz A . IN signal conditioning for improved dynamic performance and fully matched channel-to-channel performance. The module 4. Optimized for IF sampling. FUNCTIONAL BLOCK DIAGRAM A A2 A B2 IN IN 7 63 D00A 34 50 D00B (LSB) (LSB) D01A 33 49 D01B T1A T1B 32 48 D02A D02B D03A 31 47 D03B 50 50 D04A 30 46 D04B T/H T/H AD10200 D05A 29 45 D05B 28 42 D06A D06B D07A 25 41 D07B ADC ADC D08A 24 40 D08B 12 12 12 12 D09A 23 39 D09B D10A 22 38 D10B OUTPUT RESISTORS OUTPUT RESISTORS D11A 21 37 D11B (MSB) (MSB) TIMING REF REF TIMING 18 17 3 56 53 54 ENCODEA ENCODEA REF A OUT REF B OUT ENCODEB ENCODEB REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties that Tel: 781/329-4700 www.analog.com may result from its use. No license is granted by implication or otherwise Fax: 781/326-8703 Analog Devices, Inc., 20012016 under any patent or patent rights of Analog Devices.1 (V = 3.3 V, V = 5.0 V ENCODE = 105 MSPS, unless otherwise noted) AD10200SPECIFICATIONS DD CC Test MIL Parameter Temp Level Subgroup Min Typ Max Unit RESOLUTION 12 Bits DC ACCURACY Differential Nonlinearity Full IV 12 0.99 0.5 +0.99 LSB Integral Nonlinearity Full IV 12 3 0.75 +3 LSB No Missing Codes Full I 1, 2, 3 Guaranteed 2 Gain Error Full I 1, 2, 3 9 1+9% FS Output Offset Full I 1, 2, 3 12 +12 LSB ANALOG INPUT Input Voltage Range 25C V 2.048 V p-p Input Impedance 25CV 50 3 Input VSWR Full IV 12 1.1:1 1.25:1 Ratio Analog Input Bandwidth, High Full IV 12 200 250 MHz Analog Input Bandwidth, Low Full IV 12 1 MHz ANALOG REFERENCE Output Voltage Full I 1, 2, 3 2.4 2.5 2.6 V Load Current 25CV 5 mA Tempco Full V 50 ppm/C SWITCHING PERFORMANCE Maximum Conversion Rate Full I 4, 5, 6 105 MSPS Minimum Conversion Rate Full IV 12 10 MSPS Duty Cycle Full IV 12 45 50 55 % Aperture Delay (t)25C V 1.0 ns A Aperture Uncertainty (Jitter) 25C V 0.25 ps rms 4 Output Valid Time (t ) Full IV 12 3.0 5.3 ns V 4 Output Propagation Delay ( ) Full IV 12 4.5 5.5 8.0 ns PD Output Rise Time (t)25C V 12 3.5 ns R Output Fall Time (t)25C V 12 3.3 ns F DIGITAL INPUTS Encode Input Common Mode Full IV 12 1.2 1.6 2.0 V Differential Input (Enc, Enc) Full IV 12 0.4 5.0 V Logic 1 Voltage Full IV 12 2.0 V Logic 0 Voltage Full IV 12 0.8 V Input Resistance Full IV 12 358k Input Capacitance 25C V 4.5 pF DIGITAL OUTPUTS 4 Logic 1 Voltage Full VI 1, 2, 3 3.1 3.3 V 4 Logic 0 Voltage Full VI 1, 2, 3 0 0.2 V Output Coding Twos Complement 5 POWER SUPPLY 6 Power Dissipation Full I 1, 2, 3 1800 2200 mW Power Supply Rejection Ratio Full IV 12 0.5 5 mV/V I (DV ) Current Full I 1, 2, 3 25 40 mA DD I (AV ) Current Full I 1, 2, 3 340 410 mA CC DYNAMIC PERFORMANCE 7 Signal-to-Noise Ratio (SNR) (Without Harmonics) f = 10 MHz 25C V 67 dBFS IN Full V 66 dBFS f = 41 MHz 25C I 4 64 66.5 dBFS IN Full II 5, 6 62 65 dBFS f = 71 MHz 25C I 4 62.5 66.4 dBFS IN Full II 5, 6 61.5 64 dBFS f = 121 MHz 25C I 4 61 65 dBFS IN Full II 5, 6 61 64 dBFS 2 REV. B