Internally Trimmed Integrated Circuit Multiplier Data Sheet AD532 FEATURES FUNCTIONAL BLOCK DIAGRAM X Pretrimmed to 1.0% (AD532K) 1 V X X No external components required 2 RR Guaranteed 1.0% maximum 4-quadrant error (AD532K) X Z Differential inputs for (X X ) (Y Y )/10 V transfer function 1 2 1 2 Y 1 OUTPUT Monolithic construction, low cost V Y Y 2 10R V APPLICATIONS OS (X X ) (Y Y ) 1 2 1 2 R Multiplication, division, squaring, square rooting V = OUT 10V Algebraic computation (WITH Z TIED TO OUTPUT) Power measurements Figure 1. Instrumentation applications GUARANTEED PERFORMANCE OVER Available in chip form TEMPERATURE GENERAL DESCRIPTION The AD532J and AD532K are specified for maximum multiplying The AD532 is the first pretrimmed, single chip, monolithic errors of 2% and 1% of full scale, respectively at 25C, and multiplier/divider. It guarantees a maximum multiplying error are rated for operation from 0C to 70C. The AD532S has a of 1.0% and a 10 V output voltage without the need for any maximum multiplying error of 1% of full scale at 25C it is external trimming resistors or output op amp. Because the AD532 also 100% tested to guarantee a maximum error of 4% at the is internally trimmed, its simplicity of use provides design extended operating temperature limits of 55C and +125C. engineers with an attractive alternative to modular multipliers, All devices are available in either a hermetically sealed TO-100 and its monolithic construction provides significant advantages metal can or 14-lead D-14 side brazed ceramic DIP. The J, K, in size, reliability, and economy. Further, the AD532 can be a and S grade chips are also available. direct replacement for other IC multipliers that require external ADVANTAGES OF ON THE CHIP TRIMMING OF trim networks. THE MONOLITHIC AD532 FLEXIBILITY OF OPERATION 1. True ratiometric trim for improved power supply rejection. The AD532 multiplies in four quadrants with a transfer function of 2. Reduced power requirements since no networks across (X1 X2)(Y1 Y2)/10 V, divides in two quadrants with a 10 V Z/ supplies are required. (X1 X2) transfer function, and square roots in one quadrant 3. More reliable because standard monolithic assembly with a transfer function of 10V Z . In addition to these basic techniques can be used rather than more complex hybrid approaches. functions, the differential X and Y inputs provide significant 4. High impedance X and Y inputs with negligible circuit operating flexibility both for algebraic computation and transducer loading. instrumentation applications. Transfer functions, such as XY/10 V, 2 2 2 5. Differential X and Y inputs for noise rejection and additional (X Y )/10 V, X /10 V, and 10 V Z/(X X ), are easily attained 1 2 computational flexibility. and are extremely useful in many modulation and function generation applications, as well as in trigonometric calculations for airborne navigation and guidance applications, where the monolithic construction and small size of the AD532 offer considerable system advantages. In addition, the high common- mode rejection ratio (CMRR) (75 dB) of the differential inputs makes the AD532 especially well qualified for instrumentation applications, as it can provide an output signal that is the product of two transducer generated input signals. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 00502-003AD532 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Functional Description .....................................................................9 Applications ....................................................................................... 1 AD532 Performance Characteristics ........................................... 10 General Description ......................................................................... 1 Nonlinearity ................................................................................ 10 Flexibility of Operation .................................................................... 1 AC Feedthrough ......................................................................... 10 Functional Block Diagram .............................................................. 1 Common-Mode Rejection ........................................................ 10 Guaranteed Performance Over Temperature ............................... 1 Dynamic Characteristics ........................................................... 10 Advantages of On The Chip Trimming of The Monolithic Power Supply Considerations ................................................... 10 AD532 ................................................................................................ 1 Noise Characteristics ................................................................. 10 Revision History ............................................................................... 2 Applicat ions ..................................................................................... 11 Specif icat ions ..................................................................................... 3 Replacing Other IC Multipliers ................................................ 11 Thermal Resistance .......................................................................... 5 Square Root ................................................................................. 12 Chip Dimensions And Bonding Diagram ................................ 5 Difference of Squares ................................................................. 12 ESD Caution .................................................................................. 5 Additional Information ............................................................. 12 Pin Configuration and Function Descriptions ............................. 6 Outline Dimensions ....................................................................... 13 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 13 REVISION HISTORY 9/15Rev. D to Rev. E Deleted E-20-1 Package ................................................ Throughout Changes to Guaranteed Performance Over Temperature Section ... 1 Deleted Figure 4 Renumbered Sequentially ................................. 6 Deleted Table 4 Renumbered Sequentially .................................. 7 Changes to Figure 14, Figure 15, and Figure 16 ......................... 11 Changes to Figure 17 and Figure 18 ............................................. 12 Added Additional Information Section ....................................... 12 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 14 2/11Rev. C to Rev. D Updated Format .................................................................. Universal Added Pin Configuration and Function Descriptions Section .. 6 Added Typical Performance Characteristics Section .................. 8 Changes to Figure 11 ........................................................................ 8 Changes to Figure 12 and Figure 13 ............................................... 9 Changes to Ordering Guide .......................................................... 15 2/01Revision 0: Initial Version Rev. E Page 2 of 14