Dual, Low Noise, Single-Supply Variable Gain Amplifier AD605 FEATURES FUNCTIONAL BLOCK DIAGRAM 2 independent linear-in-dB channels FIXED GAIN PRECISION PASSIVE Input noise at maximum gain: 1.8 nV/Hz, 2.7 pA/Hz AMPLIFIER VGN GAIN INPUT ATTENUATOR +34.4dB CONTROL Bandwidth: 40 MHz (3 dB) OUT AND Differential input SCALING VREF Absolute gain range programmable FBK 14 dB to +34 dB (FBK shorted to OUT) through VOCM 0 dB to 48 dB (FBK open) Variable gain scaling: 20 dB/V through 40 dB/V +IN DIFFERENTIAL ATTENUATOR Stable gain with temperature and supply variations 0 TO 48.4dB IN AD605 Single-ended unipolar gain control Output common mode independently set Figure 1. Power shutdown at lower end of gain control Single 5 V supply Low power: 90 mW/channel Drives ADCs directly APPLICATIONS Ultrasound and sonar time-gain controls High performance AGC systems Signal measurement GENERAL DESCRIPTION The AD605 is a low noise, accurate, dual-channel, linear-in-dB Each independent channel of the AD605 provides a gain range variable gain amplifier (VGA), optimized for any application of 48 dB that can be optimized for the application. Gain ranges requiring high performance, wide bandwidth variable gain between 14 dB to +34 dB and 0 dB to +48 dB can be selected control. Operating from a single 5 V supply, the AD605 provides by a single resistor between Pin FBK and Pin OUT. The lower differential inputs and unipolar gain control for ease of use. and upper gain ranges are determined by shorting Pin FBK to Added flexibility is achieved with a user-determined gain range Pin OUT or leaving Pin FBK unconnected, respectively. The and an external reference input that provide user-determined two channels of the AD605 can be cascaded to provide 96 dB gain scaling (dB/V). of very accurate gain range in a monolithic package. The high performance linear-in-dB response of the AD605 is The gain control interface provides an input resistance of achieved with the differential input, single-supply, exponential approximately 2 M and scale factors from 20 dB/V to 30 dB/V amplifier (DSX-AMP) architecture. Each of the DSX-AMPs for a VREF input voltage of 2.5 V to 1.67 V, respectively. Note comprises a variable attenuator of 0 dB to 48.4 dB followed by that scale factors up to 40 dB/V are achievable with reduced a high speed, fixed-gain amplifier. The attenuator is based on a accuracy for scales above 30 dB/V. The gain scales linearly in dB 7-stage R-1.5R ladder network. The attenuation between tap with control voltages (VGN) of 0.4 V to 2.4 V for the 20 dB/V points is 6.908 dB, and 48.360 dB for the entire ladder network. scale and 0.20 V to 1.20 V for the 40 dB/V scale. When VGN is <50 mV, the amplifier is powered down to draw 1.9 mA. Under The DSX-AMP architecture results in 1.8 nV/Hz input noise spectral density and accepts a 2.0 V input signal when VOCM normal operation, the quiescent supply current of each amplifier is biased at VP/2. channel is only 18 mA. The AD605 is available in a 16-lead PDIP and a 16-lead SOIC N package and is guaranteed for operation over the 40C to +85C temperature range. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 19962008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 00541-001AD605 TABLE OF CONTENTS Features .............................................................................................. 1 Gain Control Interface ............................................................... 14 Applications ....................................................................................... 1 Fixed Gain Amplifier and Interpolator CircuitsApplying an Active Feedback Amplifier ........................................................ 15 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 16 General Description ......................................................................... 1 Connecting Two Amplifiers to Double the Gain Range ....... 16 Revision History ............................................................................... 2 Evaluation Board ............................................................................ 18 Specif icat ions ..................................................................................... 3 Input Connections ..................................................................... 18 Absolute Maximum Ratings ............................................................ 5 Adjusting Gain, Common-Mode, and Reference Levels ...... 18 ESD Caution .................................................................................. 5 Output Connections .................................................................. 18 Pin Configuration and Function Descriptions ............................. 6 Outline Dimensions ....................................................................... 21 Typical Performance Characteristics (per Channel) ................... 7 Ordering Guide .......................................................................... 22 Theory of Operation ...................................................................... 13 Differential Ladder (Attenuator) .............................................. 14 AC Coupling ............................................................................... 14 REVISION HISTORY 6/08Rev. E to Rev. F 7/04Rev. B to Rev. C Added Evaluation Board Section ................................................. 18 Edits to General Description ........................................................... 1 Added Figure 42 and Table 4......................................................... 18 Edits to Specifications ....................................................................... 2 Added Figure 43 and Figure 44..................................................... 19 Edits to Ordering Guide ................................................................... 3 Change to TPC 22 ............................................................................. 6 Added Figure 45 to Figure 50 ........................................................ 20 Updated Outline Dimensions ....................................................... 12 5/07Rev. D to Rev. E Changes to Table 1 ............................................................................ 5 Changes to Fixed Gain Amplifier and Interpolator Circuits Applying an Active Feedback Amplifier Section ........................ 15 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 19 1/06Rev. C to Rev. D Updated Format .................................................................. Universal Changes to Table 2 ............................................................................ 5 Changes to Differential Ladder (Attenuator) Section ............... 14 Updated the Outline Dimensions ................................................ 18 Changes to the Ordering Guide .................................................... 19 Rev. F Page 2 of 24