High Current Driver Amplifier and Digital VGA/Preamplifier with 3 dB Steps Data Sheet AD8260 FEATURES FUNCTIONAL BLOCK DIAGRAM VOCM INPP INRP INRN INPN TXFB VNEG VNEG High current driver 32 31 30 29 28 27 26 25 Differential inputdirect drive from DAC 1.5k 1k 1k 1.5k Preset gain: 1.5 3 dB bandwidth: 195 MHz VMDO 1 24 TXOP + Large output drive: >300 mA GM 1 VGA/preamplifier TXEN 2 23 TXOP HIGH CURRENT DRIVER Low noise VMDI AD8260 22 3 VPOS Voltage noise: 2.4 nV/Hz VMID Current noise: 5 pA/Hz VNCM 4 21 VPOS BIAS 3 dB bandwidth: 230 MHz VPSB 5 20 Gain range: 30 dB in 3 dB steps VPSR 6 dB to +24 dB (for preamplifier gain of 6 dB) VGA/PREAMPLIFIER 19 VMDO ENBL 6 Single-ended preamplifier input and differential VGA ATTENUATOR output VGAP 7 18 PRAI Supplies: 3.3 V to 10 V (with VMID enabled) GM STAGES 3.3 V to 5 V (with VMID disabled) VGAN 8 17 FDBK LOGIC Power: 93 mW with 3.3 V supplies Power-down for VGA, driver amplifier, and system 9 10 11 12 13 14 15 16 VNGR VPSR GNS3 GNS2 GNS1 GNS0 PRAO VNGR APPLICATIONS Figure 1. Functional Block Diagram Digital AGC systems Tx/Rx signal processing Power line transceivers GENERAL DESCRIPTION The AD8260 includes a high current driver, usable as a dynamic range, it is essential that the part be ac-coupled when transmitter, and a low noise digitally programmable variable operating on a single supply. gain amplifier (DGA), useable as a receiver. The AD8260 preamplifier (PrA) is configured with external The receiver section consists of a single-ended input preampli- resistors for gains greater than 6 dB and can be inverting or fier, and linear-in-dB, differential-output DGA. The receiver has noninverting. The DGA is characterized with a noninverting a small signal 3 dB bandwidth of 230 MHz the driver small preamplifier gain of 2. The attenuator has a range of 30 dB and signal bandwidth is 195 MHz. The driver delivers 300 mA, the output amplifier has a gain of 8 (18.06 dB). The lowest noninverting gain range is 6 dB to +24 dB and shifts up with well suited for driving low impedance loads, even when connected to a 3.3 V supply. increased preamplifier gain. The gain is controlled via a parallel port (Pin GNS0 to Pin GNS3) with 10 gain steps of 3 dB per The AD8260 DGA is ideal for trim applications and has a gain code. The preamplifier and DGA are disabled for any code that span of 30 dB, in 3 dB steps. Excellent bandwidth uniformity is is not assigned a gain step. maintained across the entire frequency range. The low output- referred noise of the DGA is advantageous in driving high The AD8260 can operate with single or dual supplies from 3.3 V speed ADCs. The differential output facilitates the interface to to 5 V. An internal buffer normally provides a split supply modern low voltage high speed ADCs. reference for single-supply operation an external reference can also be used when the VMID buffer is shut down. Single-supply and dual-supply operation makes the part versatile and enables gain control of negative-going pulses, such as those The operating temperature range is 40C to +105C. The generated by photodiodes or photo-multiplier tubes, as well as AD8260 is available in a 5 mm 5 mm, 32-lead LFCSP. processing band-pass signals on a single supply. For maximum Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 07192-001AD8260 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 VMID Buffer ............................................................................... 22 Applications ....................................................................................... 1 Preamplif ier ................................................................................. 22 Functional Block Diagram .............................................................. 1 Preamplifier Noise ...................................................................... 22 General Description ......................................................................... 1 DGA ............................................................................................. 23 Revision History ............................................................................... 2 Gain Control ............................................................................... 23 Specif icat ions ..................................................................................... 3 Output Stage ................................................................................ 23 Absolute Maximum Ratings ............................................................ 6 Attenuator.................................................................................... 23 ESD Caution .................................................................................. 6 Single-Supply Operation and AC Coupling ........................... 24 Pin Configuration and Function Descriptions ............................. 7 Power-Up/Power-Down Sequence .......................................... 24 Typical Performance Characteristics ............................................. 8 Logic Interfaces ........................................................................... 24 Test Circuits ..................................................................................... 16 Applications Information .............................................................. 25 Theory of Operation ...................................................................... 20 Evaluation Board ............................................................................ 26 O ver vie w ...................................................................................... 20 Connecting the Evaluation Board ............................................ 27 High Current Driver Amplifier ................................................ 21 Outline Dimensions ....................................................................... 32 Precautions to Be Observed During Half-Duplex Operation Ordering Guide .......................................................................... 32 ....................................................................................................... 22 REVISION HISTORY 5/16Rev. A to Rev. B Change CP-32-8 to CP-32-21 ...................................... Throughout Updated Outline Dimensions ....................................................... 32 Changes to Ordering Guide .......................................................... 32 2/11Rev. 0 to Rev. A Added EPAD Notation .................................................................... 7 Changes to Figure 70 ...................................................................... 29 5/08Revision 0: Initial Version Rev. B Page 2 of 32