Low Cost, DC to 500 MHz, 92 dB Logarithmic Amplifier Data Sheet AD8307 FEATURES FUNCTIONAL BLOCK DIAGRAM Complete multistage logarithmic amplifier AD8307 92 dB dynamic range: 75 dBm to +17 dBm to 90 dBm BAND GAP REFERENCE VPS 7 7.5mA 6 ENB AND BIASING using matching network SIX 14.3dB 900MHz Single supply of 2.7 V minimum at 7.5 mA typical 5 INT AMPLIFIER STAGES +INP DC to 500 MHz operation, 1 dB linearity INP 8 MIRROR 1.1k Slope of 25 mV/dB, intercept of 84 dBm INM 1 INP 2A 3 Highly stable scaling over temperature /dB 4 OUT 2 NINE DETECTOR CELLS Fully differential dc-coupled signal path 12.5k SPACED 14.3dB 100 ns power-up time, 150 A sleep current 2 COM COM INPUT-OFFSET 3 OFS APPLICATIONS COMPENSATION LOOP Conversion of signal level to decibel form Transmitter antenna power measurement Figure 1. Receiver signal strength indication (RSSI) Low cost radar and sonar signal processing Network and spectrum analyzers (to 120 dB) Signal level determination down to 20 Hz True decibel ac mode for multimeters GENERAL DESCRIPTION The AD8307 is the first logarithmic amplifier made available in Table 1. Next Generation Upgrades for the AD8307 an 8-lead SOIC N package. It is a complete 500 MHz monolithic Device No. Product Description demodulating logarithmic amplifier based on the progressive AD8310 15 ns Response Time, Buffered Output compression (successive detection) technique, providing a ADL5513 Lower Input Range (80 dB), Operation to 4 GHz, dynamic range of 92 dB to 3 dB law conformance and 88 dB Higher Power Consumption to a tight 1 dB error bound at all frequencies up to 100 MHz. AD8309 Higher Input Range (100 dB), Limiter Output The AD8307 is extremely stable and easy to use, requiring no significant external components. A single-supply voltage of 2.7 V to 5.5 V at 7.5 mA is needed. A fast acting CMOS- compatible control pin can disable the AD8307 to a standby current of 150 A. The AD8307 operates over the industrial temperature range of 40C to +85C and is available in an 8-lead SOIC package and an 8-lead PDIP. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 19972019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 0 1 082 -001AD8307 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Enable Interface .......................................................................... 14 Applications ....................................................................................... 1 Input Interface ............................................................................ 14 Functional Block Diagram .............................................................. 1 Offset Interface ........................................................................... 15 General Description ......................................................................... 1 Output Interface ......................................................................... 15 Revision History ............................................................................... 2 Theory of Operation ...................................................................... 17 Specif icat ions ..................................................................................... 3 Basic Connections ...................................................................... 17 Absolute Maximum Ratings ............................................................ 4 Input Matching ........................................................................... 18 ESD Caution .................................................................................. 4 Narrow-Band Matching ............................................................ 18 Pin Configuration and Function Descriptions ............................. 5 Slope and Intercept Adjustments ............................................. 19 Typical Performance Characteristics ............................................. 6 Applications Information .............................................................. 20 Log Amp Theory .............................................................................. 9 Buffered Output .......................................................................... 20 Progressive Compression .......................................................... 10 Four-Pole Filter ........................................................................... 20 Demodulating Log Amps .......................................................... 11 1 W to 1 kW 50 Power Meter ............................................. 21 Intercept Calibration .................................................................. 12 Measurement System with 120 dB Dynamic Range .............. 21 Offset Control ............................................................................. 12 Operation at Low Frequencies .................................................. 22 Extension of Range ..................................................................... 13 Outline Dimensions ....................................................................... 23 Interfaces .......................................................................................... 14 Ordering Guide .......................................................................... 24 REVISION HISTORY 12/2019Rev. E to Rev. F 6/2003Rev. A to Rev. B Changes to Ordering Guide .......................................................... 24 Renumbered TPCs and Figures ........................................ Universal Changes to Ordering Guide ............................................................. 3 9/2015Rev. D to Rev. E Changes to Figure 24 ...................................................................... 17 Changes to General Description Section ...................................... 1 Deleted Evaluation Board Information ....................................... 18 Added Table 1 Renumbered Sequentially .................................... 1 Updated Outline Dimensions ....................................................... 19 7/2008Rev. C to Rev. D Deleted DC-Coupled Applications Section ................................ 22 Deleted Operation Above 500 MHz Section .............................. 23 Updated Outline Dimensions ....................................................... 23 10/2006Rev. B to Rev. C Updated Format .................................................................. Universal Changes to Table 1 ............................................................................ 3 Changes to Table 3 ............................................................................ 5 Changes to Offset Interface ........................................................... 15 Changes to Output Interface ......................................................... 15 Updated captions to Outline Dimensions ................................... 24 Changes to Ordering Guide .......................................................... 24 Rev. F Page 2 of 24