5 MHz500 MHz 100 dB Demodulating
a
Logarithmic Amplifier with Limiter Output
AD8309
FEATURES FUNCTIONAL BLOCK DIAGRAM
Complete Multistage Log-Limiting IF Amplifier
SIX STAGES TOTAL GAIN 72dB TYP GAIN 18dB
100 dB Dynamic Range: 78 dBm to +22 dBm (Re 50 V)
Stable RSSI Scaling Over Temperature and Supplies: INHI LMHI
12dB 12dB 12dB LIM
20 mV/dB Slope, 95 dBm Intercept
INLO LMLO
60.4 dB RSSI Linearity up to 200 MHz
BIAS
LADR ATTEN
LMDR
CTRL
Programmable Limiter Gain and Output Current
4 3 DET DET DET DET
Differential Outputs to 10 mA, 2.4 V p-p
I-V VLOG
Overall Gain 100 dB, Bandwidth 500 MHz
TEN DETECTORS SPACED 12dB
FLTR
Constant Phase (Typical 680 ps Delay Skew)
Single Supply of +2.7 V to +6.5 V at 16 mA Typical
GAIN BAND-GAP SLOPE INTERCEPT
ENBL
Fully Differential Inputs, R = 1 kV, C = 2.5 pF BIAS REFERENCE BIAS TEMP COMP
IN IN
500 ns Power-Up Time, <1 mA Sleep Current
APPLICATIONS
Receivers for Frequency and Phase Modulation
Very Wide Range IF and RF Power Measurement
Receiver Signal Strength Indication (RSSI)
Low Cost Radar and Sonar Signal Processing
Instrumentation: Network and Spectrum Analyzers
PRODUCT DESCRIPTION The overall dynamic range for this combination extends from
The AD8309 is a complete IF limiting amplifier, providing both 91 dBV (78 dBm at the 50 W level) to a maximum permissible
an accurate logarithmic (decibel) measure of the input signal value of +9 dBV, using a balanced drive of antiphase inputs each
(the RSSI function) over a dynamic range of 100 dB, and a of 2 V in amplitude, which would correspond to a sine wave
programmable limiter output, useful from 5 MHz to 500 MHz. power of +22 dBm if the differential input were terminated in
50 W . The slope of the RSSI output is closely controlled to
It is easy to use, requiring few external components. A single
20 mV/dB, while the intercept is set to 108 dBV (95 dBm
supply voltage of +2.7 V to +6.5 V at 16 mA is needed, corre-
re 50 W ). These scaling parameters are determined by a band-
sponding to a power consumption of under 50 mW at 3 V, plus
gap voltage reference and are substantially independent of tem-
the limiter bias current, determined by the application and
perature and supply. The logarithmic law conformance is typically
typically 2 mA, providing a limiter gain of 100 dB when using
within 0.4 dB over the central 80 dB of this range at any fre-
200 W loads. A CMOS-compatible control interface can enable
quency between 10 MHz and 200 MHz, and is degraded only
the AD8309 within about 500 ns and disable it to a standby
slightly at 500 MHz.
current of under 1 m A.
The RSSI response time is nominally 67 ns (10%90%). The
The six cascaded amplifier/limiter cells in the main path have a
averaging time may be increased without limit by the addition of
small signal gain of 12.04 dB ( 4), with a 3 dB bandwidth of
an external capacitor. The full output of 2.34 V at the maximum
850 MHz, providing a total gain of 72 dB. The programmable
input of +9 dBV can drive any resistive load down to 50 W and
output stage provides a further 18 dB of gain. The input is fully
this interface remains stable with any value of capacitance on
differential and presents a moderately high impedance (1 kW in
the output.
parallel with 2.5 pF). The input-referred noise-spectral-density,
when driven from a terminated 50 W , source is 1.28 nV/ Hz, The AD8309 is fabricated on an advanced complementary
equivalent to a noise figure of 3 dB. The sensitivity of the bipolar process using silicon-on-insulator isolation techniques
AD8309 can be raised by using an input matching network. and is available in the industrial temperature range of 40 C to
+85 C, in a 16-lead TSSOP package.
Each of the main gain cells includes a full-wave detector. An
additional four detectors, driven by a broadband attenuator, are
used to extend the top end of the dynamic range by over 48 dB.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: (V = +5 V, T = +258C, unless otherwise noted)
AD8309SPECIFICATIONS
S A
1 1
Parameter Conditions Min Typ Max Units
INPUT STAGE (Inputs INHI, INLO)
2
Maximum Input Differential Drive, p-p 3.5 4V
+9 dBV
Equivalent Power in 50 W Terminated in 52.3 W +22 dBm
Noise Floor Terminated 50 W Source 1.28 nV/ Hz
Equivalent Power in 50 W 500 MHz Bandwidth 78 dBm
Input Resistance From INHI to INLO 800 1000 1200 W
Input Capacitance From INHI to INLO 2.5 pF
DC Bias Voltage Either Input 1.725 V
LIMITING AMPLIFIER (Outputs LMHI, LMLO)
Usable Frequency Range 5 500 MHz
At Limiter Output R = R = 50 W to 10 dB Point 875 MHz
LOAD LIM
Phase Variation at 100 MHz Over Input Range 60 dBm to +10 dBm 3 Degrees
Limiter Output Current Nominally 400 mV/R 0110 mA
LIM
Versus Temperature 40 C T +85 C 0.008 %/ C
A
3
Input Range 78 +9 dBV
Equivalent dBm 65 +22 dBm
Maximum Output Voltage At Either LMHI or LMLO, wrt VPS2 1 1.25 V
Rise/Fall Time (10%90%) R 50 W , 40 W R 400 W 0.4 ns
LOAD LIM
LOGARITHMIC AMPLIFIER (Output VLOG)
3 dB Error Dynamic Range From Noise Floor to Maximum Input 100 dB
Transfer Slope 5 MHz f 200 MHz 18 20 22 mV/dB
< +85 C 17 20 23 mV/dB
Over Temperature 40 C < T
A
Intercept (Log Offset) 5 MHz f 200 MHz 116 108 100 dBV
Equivalent dBm (re 50 W ) 103 95 87 dBm
+85 C 117 108 99 dBV
Over Temperature 40 C T
A
Equivalent dBm (re 50 W ) 104 95 86 dBm
Temperature Sensitivity 0.009 dB/ C
Linearity Error (Ripple) Input from 83 dBV (70 dBm) to +7 dBV (+20 dBm) 0.4 dB
Output Voltage Input = 91 dBV (78 dBm) V = +5 V, +2.7 V 0.34 V
S
Input = +9 dBV (+22 dBm) V = +5 V 2.34 2.75 V
S
Input = +9 dBV (+22 dBm) V = +2.75 V 2.10 V
S
Minimum Load Resistance, R 40 50 W
L
Maximum Sink Current To Ground 0.75 1.0 1.25 mA
Output Resistance 0.3 W
Small-Signal Bandwidth 3.5 MHz
Output Settling Time to 1% Large Scale Input, +3 dBV (+16 dBm),
50 W , C 100 pF 120 220 ns
R
L L
Rise/Fall Time (10%90%) Large Scale Input, +3 dBV (+16 dBm),
R 50 W , C 100 pF 67 100 ns
L L
POWER INTERFACES
Supply Voltage, V 2.7 5 6.5 V
POS
Quiescent Current Zero-Signal, LMDR Open 13 16 20 mA
Over Temperature 40 C < T < +85 C 111623 mA
A
Disable Current 40 C < T < +85 C 0.01 4 m A
A
Additional Bias for Limiter R = 400 W (See Text) 1.4 1.6 mA
LIM
Logic Level to Enable Power HI Condition, 40 C < T < +85 C 1.8 V V
A POS
Input Current when HI 3 V at ENBL, 40 C < T < +85 C4060 m A
A
Logic Level to Disable Power LO Condition, 40 C < T < +85 C 0.5 1 V
A
NOTES
1
Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.
2
The input level is specified in dBV since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50 W termination corresponds to an input of 0.2236 V rms. Hence, the relationship between dBV and dBm is a fixed
offset of +13 dBm in the special case of a 50 W termination.
3
Due to the extremely high Gain Bandwidth Product of the AD8309, the output of either LMHI or LMLO will be unstable for levels below 78 dBV (65 dBm, re 50 W ).
Specifications subject to change without notice.
2 REV. B