General-Purpose, 55C to +125C, Wide Bandwidth, DC-Coupled VGA Data Sheet AD8336 FEATURES GENERAL DESCRIPTION Low noise The AD8336 is a low noise, single-ended, linear in dB, general- Voltage noise: 3 nV/Hz purpose variable gain amplifier, usable over a large range of Current noise: 3 pA/Hz supply voltages. It features an uncommitted preamplifier with a Small-signal BW: 115 MHz usable gain range of 6 dB to 26 dB. The VGA gain range is 0 dB Large-signal BW: 2 V p-p = 80 MHz to 60 dB, with absolute gain limits of 26 dB to +34 dB. When Slew rate: 550 V/s, 2 V p-p the preamplifier gain is adjusted for 12 dB, the combined 3 dB Gain ranges (specified) bandwidth of the preamplifier and VGA is 100 MHz, and the 14 dB to +46 dB amplifier is fully usable to 80 MHz. With 5 V supplies, the 0 dB to 60 dB maximum output swing is 7 V p-p. Gain scaling: 50 dB/V Because of the X-AMP architecture, frequency response is DC-coupled maintained across the entire gain range of the VGA. The differen- Single-ended input and output tial gain control interface provides precise linear in dB gain scaling Supplies: 3 V to 12 V of 50 dB/V over the temperature span of 55C to +125C and Temperature range: 55C to +125C is simple to interface with a variety of external sources. Power The large supply voltage range makes the AD8336 suited for 150 mW at 3 V, 55C < T < +125C industrial medical applications and video circuits. Dual-supply 84 mW at 3 V, PWRA = 3 V operation enables bipolar input signals, such as those generated APPLICATIONS by photodiodes or photomultiplier tubes. Industrial process controls The fully independent voltage feedback preamplifier allows both High performance AGC systems inverting and noninverting gain topologies. The AD8336 can be I/Q signal processing used within the specified gain range of 14 dB to +60 dB by Video selecting a preamplifier gain between 6 dB and 26 dB and choosing Industrial and medical ultrasound appropriate feedback resistors. For the nominal preamplifier gain of Radar receivers 4, the overall gain range is 14 dB to +46 dB. If required, quiescent power is limited to a safe level by asserting the PWRA pin. FUNCTIONAL BLOCK DIAGRAM AD8336 INPP 4 PRAO VGAI + ATTENUATOR PREAMP 8 9 34dB 1 VOUT 60dB TO 0dB INPN 5 GAIN CONTROL PWRA 2 BIAS INTERFACE 10 13 3 11 12 VNEG VPOS VCOM GPOS GNEG Figure 1. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20062017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 06228-001AD8336 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 VGA ............................................................................................. 20 Applications ....................................................................................... 1 Setting the Gain .......................................................................... 21 General Description ......................................................................... 1 Noise ............................................................................................ 21 Functional Block Diagram .............................................................. 1 Offset Voltage .............................................................................. 21 Revision History ............................................................................... 2 Applications Information .............................................................. 22 Specifications ..................................................................................... 3 Amplifier Configuration ........................................................... 22 Absolute Maximum Ratings ............................................................ 5 Preamplifier ................................................................................. 22 ESD Caution .................................................................................. 5 Using the Power Adjust Feature ............................................... 23 Pin Configuration and Function Descriptions ............................. 6 Driving Capacitive Loads .......................................................... 23 Typical Performance Characteristics ............................................. 7 Evaluation Board ............................................................................ 24 Test Circuits ..................................................................................... 16 Optional Circuitry ...................................................................... 24 Theory of Operation ...................................................................... 20 Board Layout Considerations ................................................... 24 Overview ...................................................................................... 20 Outline Dimensions ....................................................................... 27 Preamplifier ................................................................................. 20 Ordering Guide .......................................................................... 27 REVISION HISTORY 11/2017Rev. E to Rev. F 9/2008Rev. 0 to Rev. A Changes to Figure 2 .......................................................................... 6 Change to General Description Section ......................................... 1 Updated Outline Dimensions ....................................................... 28 Deleted Input Capacitance Parameter, Table 1 .............................. 3 Changes to Ordering Guide .......................................................... 28 Added Exposed Pad Notation to Figure 2 ...................................... 6 Changes to Figure 11 ......................................................................... 8 9/2016Rev. D to Rev. E Changes to Figure 55 ...................................................................... 15 Changes to Figure 47, Figure 48, and Figure 50 ......................... 14 Change to Preamplifier Section .................................................... 20 Changes to Figure 51 ...................................................................... 15 Changes to Noise Section .............................................................. 21 Change to Circuit Configuration for Noninverting 5/2016Rev. C to Rev. D Gain Section .................................................................................... 22 Changes to General Description Section and Figure 1 ............... 1 Changes to Table 5 .......................................................................... 22 Changes to Figure 89 and Table 6................................................. 26 Changes to Figure 2 and Table 3 ..................................................... 6 Change to Overview Section ......................................................... 20 Updated Outline Dimensions ....................................................... 27 Updated Outline Dimensions ....................................................... 26 Changes to Ordering Guide .......................................................... 27 Changes to Ordering Guide .......................................................... 26 10/2006Revision 0: Initial Version 5/2011Rev. B to Rev. C Change to Figure 2 and Table 3 ...................................................... 6 Changes to OG ................................................................................ 26 4/2011Rev. A to Rev. B Change to Table 2 ............................................................................. 5 Changes to Figure 77 and Preamplifier Section ......................... 20 Changes to Evaluation Board Section, Optional Circuitry Section, and Board Layout Considerations Section ................... 24 Added Table 6 .................................................................................. 24 Deleted Figure 83 Renumbered Figures Sequentially ............... 24 Changes to Figure 82, Figure 83, and Figure 84 ......................... 24 Changes to Figure 85, Figure 86, Figure 87, and Figure 88 ....... 25 Deleted Table 6 ................................................................................ 26 Rev. F Page 2 of 27