3.3 V, 4.25 Gbps, Limiting Amplifier Data Sheet ADN2892 FEATURES GENERAL DESCRIPTION Input sensitivity: 3.5 mV p-p The ADN2892 is a 4.25 Gbps limiting amplifier with integrated 70 ps rise/fall times loss of signal (LOS) detection circuitry and a received signal CML outputs: 750 mV p-p differential strength indicator (RSSI). This part is optimized for Fibre Bandwidth selectable for multirate 1/2/4 FC modules Channel (FC) and Gigabit Ethernet (GbE) optoelectronic Optional LOS output inversion conversion applications. The ADN2892 has a differential input Programmable LOS detector: 3.5 mV to 35 mV sensitivity of 3.5 mV p-p and accepts up to a 2.0 V p-p Rx signal strength indicator (RSSI) differential input overload voltage. The ADN2892 has current SFF-8472-compliant average power measurement mode logic (CML) outputs with controlled rise and fall times. Single-supply operation: 3.3 V The ADN2892 has a selectable low-pass filter with a 3 dB Low power dissipation: 160 mW cutoff frequency of 1.5 GHz. By setting BW SEL to Logic 0, the Available in space-saving, 3 mm 3 mm, 16-lead LFCSP filter can limit the relaxation oscillation of a low cost CD laser Extended temperature range: 40C to +95C used in a legacy 1 Gbps FC transmitter. The limited BW also SFP reference design available reduces the rms noise and in turn improves the receiver optical sensitivity for a lower data rate application, such as 1 FC and APPLICATIONS GbE. 1, 2, and 4 FC transceivers By monitoring the bias current through a photodiode, the on- SFP/SFF/GBIC optical transceivers chip RSSI detector measures the average power received with GbE transceivers 2% typical linearity over the entire valid input range of the Backplane receivers photodiode. The on-chip RSSI detector facilitates SFF-8472- compliant optical transceivers by eliminating the need for external RSSI detector circuitry. Additional features include a programmable loss-of-signal (LOS) detector and output squelch. The ADN2892 is available in a 3 mm 3 mm, 16-lead LFCSP. FUNCTIONAL BLOCK DIAGRAM AVCC DRVEE AVEE BW SEL SQUELCH DRVCC ADN2892 50 50 OUTP PIN ADN2882 NIN OUTN LPF 50 50 V+ 3.5k 10k LOS V REF PD VCC RSSI/LOS ADuC7020 DETECTOR RSSI OUT PD CATHODE THRADJ LOS INV Figure 1. RSSI Function CapableApplications Setup Block Diagram Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052017 Analog Devices, Inc. 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Technical Support www.analog.com 04986-001ADN2892 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Limiting Amplifier ..................................................................... 10 Applications ....................................................................................... 1 Loss-of-Signal (LOS) Detector ................................................. 10 General Description ......................................................................... 1 Received Signal Strength Indicator (RSSI) ............................. 10 Functional Block Diagram .............................................................. 1 Squelch Mode ............................................................................. 10 Revision History ............................................................................... 2 BW SEL (Bandwidth Selection) Mode ................................... 10 Specifications ..................................................................................... 3 LOS INV (Lose of Signal Invert) Mode ................................ 10 Absolute Maximum Ratings ............................................................ 5 Applications Information .............................................................. 11 Thermal Resistance ...................................................................... 5 PCB Design Guidelines ............................................................. 11 ESD Caution .................................................................................. 5 Pad Coating and Pb-Free Soldering ........................................ 12 Pin Configuration and Function Descriptions ............................. 6 Outline Dimensions ....................................................................... 13 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 13 Theory of Operation ...................................................................... 10 REVISION HISTORY 3/2017Rev. B to Rev. C 7/2013Rev. 0 to Rev. A Changes to Figure 2 .......................................................................... 6 Change to Output Voltage Swing Parameter, Table 1 ................... 3 Changes to Figure 18 ...................................................................... 11 Changes to Figure 2 ........................................................................... 6 Updated Outline Dimensions ....................................................... 13 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 13 Changes to Ordering Guide .......................................................... 13 2/2014Rev. A to Rev. B 4/2005Revision 0: Initial Version Changes to Figure 2 .......................................................................... 6 Rev. C Page 2 of 16