Triple, 200 mA, Low Noise, High PSRR Voltage Regulator Data Sheet ADP320 FEATURES TYPICAL APPLICATION CIRCUITS Bias voltage range (VBIAS): 2.5 V to 5.5 V VBIAS ADP320 LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V VBIAS 2.5V TO 5.5V + Three 200 mA low dropout voltage regulators 1F 16-lead, 3 mm 3 mm LFCSP VIN1/VIN2 1.8V TO 5.5V Initial accuracy: 1% + LDO 1 VOUT1 1F ON Stable with 1 F ceramic output capacitors + EN1 EN LD1 OFF 1F No noise bypass capacitor required VBIAS 3 independent logic controlled enables LDO 2 VOUT2 Over current and thermal protection ON EN2 + OFF Key specifications EN LD2 1F High PSRR VBIAS VIN3 1.8V TO 76 dB PSRR up to 1 kHz 5.5V + LDO 3 VOUT3 1F ON 70 dB PSRR 10 kHz EN3 + OFF EN LD3 1F 60 dB PSRR at 100 kHz 40 dB PSRR at 1 MHz GND Low output noise Figure 1. Typical Application Circuit 24 V rms typical output noise at V = 1.2 V OUT 43 V rms typical output noise at V = 2.8 V OUT Excellent transient response Low dropout voltage: 110 mV 200 mA load 85 A typical ground current at no load, all LDOs enabled 100 s fast turn-on circuit Guaranteed 200 mA output current per regulator 40C to +125C junction temperature APPLICATIONS Mobile phones Digital cameras and audio devices Portable and battery-powered equipment Portable medical devices Post dc-to-dc regulation GENERAL DESCRIPTION The ADP320 200 mA triple output LDO combines high PSRR, low LDO offers much lower noise performance than competing LDOs noise, low quiescent current, and low dropout voltage in a voltage without the need for a noise bypass capacitor. regulator ideally suited for wireless applications with demanding The ADP320 triple LDO is available in a miniature 16-lead 3 mm performance and board space requirements. 3 mm LFCSP package and is stable with tiny 1 F 30% ceramic output The low quiescent current, low dropout voltage, and wide input capacitors, resulting in the smallest possible board area for a wide voltage range of the ADP320 triple LDO extend the battery life of variety of portable power needs. portable devices. The ADP320 triple LDO maintains power supply The ADP320 triple LDO is available in output voltage combin- rejection greater than 60 dB for frequencies as high as 100 kHz ations ranging from 0.8 V to 3.3 V and offers over current and while operating with a low headroom voltage. The ADP320 triple thermal protection to prevent damage in adverse conditions. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 09874-001ADP320 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 15 Applications ....................................................................................... 1 Applications Information .............................................................. 16 Typical Application Circuits ............................................................ 1 ADIsimPower Design Tool ....................................................... 16 General Description ......................................................................... 1 Capacitor Selection .................................................................... 16 Revision History ............................................................................... 2 Undervoltage Lockout ............................................................... 17 Specifications ..................................................................................... 3 Enable Feature ............................................................................ 17 Input and Output Capacitor, Recommended Specifications .. 4 Current-Limit and Thermal Overload Protection ................. 18 Absolute Maximum Ratings ............................................................ 5 Thermal Considerations ............................................................ 18 Thermal Resistance ...................................................................... 5 Printed Circuit Board Layout Considerations........................ 20 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 21 Pin Configurations and Function Descriptions ........................... 6 Ordering Guide .......................................................................... 21 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 2/2017Rev. B to Rev. C Added Figure 33 and Figure 34 Changes to Figure 36, Updated Outline Dimensions ....................................................... 21 Figure 37, and Figure 38 ................................................................ 12 Changes to Ordering Guide .......................................................... 21 Added Figure 39 ............................................................................. 13 Added ADIsimPower Design Tool Section ................................. 16 11/2014Rev. A to Rev. B Changes to Features Section............................................................ 1 4/2011Rev. 0 to Rev. A Changes to Table 1 ............................................................................ 3 Changes to Ordering Guide .......................................................... 20 Changes to Figure 28, Figure 29, Figure 30, and Figure 31 Added Figure 32 Renumbered Sequentially .............................. 11 6/2010Revision 0: Initial Version Rev. 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