Triple, 200 mA, Low Noise, High PSRR Voltage Regulator Data Sheet ADP322/ADP323 FEATURES TYPICAL APPLICATION CIRCUITS Fixed (ADP322) and adjustable output (ADP323) options VBIAS ADP322 VBIAS Bias voltage range (VBIAS): 2.5 V to 5.5 V 2.5V TO 5.5V + LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V 1F VIN1/VIN2 Three 200 mA low dropout voltage regulators (LDOs) 1.8V TO 5.5V + LDO 1 VOUT1 16-lead, 3 mm 3 mm LFCSP 1F ON EN1 + EN LD1 OFF 1F Initial accuracy: 1% VBIAS Stable with 1 F ceramic output capacitors No noise bypass capacitor required LDO 2 VOUT2 ON EN2 + OFF 3 independent logic controlled enables EN LD2 1F VBIAS Overcurrent and thermal protection VIN3 1.8V TO Key specifications 5.5V + VOUT3 LDO 3 1F ON High PSRR EN3 + OFF EN LD3 1F 76 dB PSRR up to 1 kHz GND 70 dB PSRR at 10 kHz 60 dB PSRR at 100 kHz Figure 1. Typical Application Circuit for ADP322 40 dB PSRR at 1 MHz Low output noise VBIAS ADP323 24 V rms typical output noise at V = 1.2 V VBIAS OUT 2.5V TO 5.5V + 43 V rms typical output noise at V = 2.8 V OUT 1F Excellent transient response VIN1/VIN2 1.8V TO VOUT1 5.5V Low dropout voltage: 110 mV at 200 mA load + LDO 1 1F + ON FB1 85 A typical ground current at no load, all LDOs enabled 1F EN1 EN LD1 OFF 100 s fast turn-on circuit VBIAS Guaranteed 200 mA output current per regulator VOUT2 LDO 2 40C to +125C junction temperature ON + FB2 EN2 1F OFF EN LD2 APPLICATIONS VBIAS VIN3 1.8V TO Mobile phones VOUT3 5.5V + LDO 3 1F Digital cameras and audio devices ON + FB3 EN3 1F OFF EN LD3 Portable and battery-powered equipment Portable medical devices GND Post dc-to-dc regulation Figure 2. Typical Application Circuit for ADP323 GENERAL DESCRIPTION The ADP322/ADP323 200 mA triple output LDOs combine high The ADP322/ADP323 are available in a miniature 16-lead, PSRR, low noise, low quiescent current, and low dropout voltage 3 mm 3 mm LFCSP package and are stable with tiny 1 F to extend the battery life of portable devices and are ideally 30% ceramic output capacitors providing the smallest possible suited for wireless applications with demanding performance board area for a wide variety of portable power needs. and board space requirements. The ADP322 is available in output voltage combinations ranging The ADP322/ADP323 PSRR is greater than 60 dB for frequencies from 0.8 V to 3.3 V and offers overcurrent and thermal protection as high as 100 kHz while operating with a low headroom voltage. to prevent damage in adverse conditions. The APDP323 The ADP322/ADP323 offer much lower noise performance than adjustable triple LDO can be configured for any output voltage competing LDOs without the need for a noise bypass capacitor. between 0.5 V and 5 V with two resistors for each output. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09288-001 09288-053ADP322/ADP323 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 17 Applications ....................................................................................... 1 ADIsimPower Design Tool ....................................................... 17 Typical Application Circuits ............................................................ 1 Capacitor Selection .................................................................... 17 General Description ......................................................................... 1 Undervoltage Lockout ............................................................... 18 Revision History ............................................................................... 2 Enable Feature ............................................................................ 18 Specifications ..................................................................................... 3 Noise Reduction of the ADP323 in Adjustable Mode ........... 19 Input and Output Capacitor, Recommended Specifications .. 4 Current-Limit and Thermal Overload Protection ................. 20 Absolute Maximum Ratings ............................................................ 5 Thermal Considerations ............................................................ 20 Thermal Resistance ...................................................................... 5 Printed Circuit Board Layout Considerations........................ 22 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 23 Pin Configurations and Function Descriptions ........................... 6 Ordering Guide .......................................................................... 23 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 16 REVISION HISTORY 11/14Rev. A to Rev. B 9/11Rev.0 to Rev. A Changes to Features Section............................................................ 1 Added Figure 2, Renumbered Sequentially ................................... 1 Changes to Table 1 ............................................................................ 3 Changes to Theory of Operation Section.................................... 15 Changes to Figure 30, Figure 31, Figure 32, and Figure 33 Added Figure 45, Renumbered Sequentially .............................. 15 Added Figure 34 Renumbered Sequentially .............................. 12 Changes to Ordering Guide .......................................................... 21 Added Figure 35 and Figure 36 Changes to Figure 38, 9/10Revision 0: Initial Version Figure 39, and Figure 40 ................................................................ 13 Added ADIsimPower Design Tool Section ................................. 17 Added Noise Reduction of the ADP323 in Adjustable Mode Section .............................................................................................. 19 Rev. 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