300 MHz, 32 32 Buffered Analog Crosspoint Switch ADV3200/ADV3201 FEATURES FUNCTIONAL BLOCK DIAGRAM VPOS VNEG DVCC DGND Large, 32 32, nonblocking switch array G = +1 (ADV3200) or G = +2 (ADV3201) operation CLK Pin-compatible 32 16 versions available 193-BIT SHIFT REGISTER DATA DATA IN (ADV3202/ADV3203) OUT 193 Single 5 V supply, dual 2.5 V supply, or UPDATE ADV3200 PARALLEL LATCH CS dual 3.3 V supply (G = +2) (ADV3201) RESET 192 Serial programming of switch array 32 32 5:32 ENABLE/ ENABLE/ 2:1 OSD insertion mux per output DECODERS BYPASS DISABLE Input sync-tip clamp SYNC-TIP OUTPUT BUFFER CLAMP High impedance output disable allows connection of 1024 G = +1 (G = +2) multiple devices with minimal output bus load Excellent video performance 60 MHz, 0.1 dB gain flatness 0.1% differential gain error (R = 150 ) L 0.1 differential phase error (R = 150 ) L SWITCH OSD MATRIX MUX Excellent ac performance 32 32 INPUTS OUTPUTS Bandwidth: >300 MHz Slew rate: >400 V/s Low power: 1.25 W Low all hostile crosstalk of 48 dB 5 MHz Reset pin allows disabling of all outputs 32 32 REFERENCE Connected through a capacitor to ground, provides power-on reset capability 176-lead exposed pad LQFP (24 mm 24 mm) VCLAMP OSD OSD VREF INPUTS SWITCHES APPLICATIONS Figure 1. CCTV surveillance Routing of high speed signals including Composite video (NTSC, PAL, S, SECAM) RGB and component video routing Compressed video (MPEG, Wavelet) Video conferencing GENERAL DESCRIPTION The ADV3200/ADV3201 are 32 32 analog crosspoint switch an output bus if building a larger array. The part is available matrices. They feature a selectable sync-tip clamp input for in a gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in ac-coupled applications and an on-screen display (OSD) back-terminated load applications. A single 5 V supply, dual insertion mux. With 48 dB of crosstalk and 80 dB isolation 2.5 V supplies, or dual 3.3 V supplies (G = +2) can be used at 5 MHz, the ADV3200/ADV3201 are useful in many high while consuming only 250 mA of idle current with all outputs density routing applications. The 0.1 dB flatness out to 60 MHz enabled. The channel switching is performed via a double makes the ADV3200/ADV3201 ideal for composite video buffered, serial digital control, which can accommodate daisy switching. chaining of several devices. The 32 independent output buffers of the ADV3200/ADV3201 The ADV3200/ADV3201 are packaged in a 176-lead exposed can be placed into a high impedance state for paralleling cross- pad LQFP (24 mm 24 mm) and are available over the point outputs so that off channels present minimal loading to extended industrial temperature range of 40C to +85C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Trademarks and registered trademarks are the property of their respective owners. 07176-001ADV3200/ADV3201 TABLE OF CONTENTS Features .............................................................................................. 1 I/O Schematics ................................................................................ 12 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 13 Functional Block Diagram .............................................................. 1 ADV3200 ..................................................................................... 13 General Description ......................................................................... 1 ADV3201 ..................................................................................... 20 Revision History ............................................................................... 2 Theory of Operation ...................................................................... 27 Specif icat ions ..................................................................................... 3 Applications Information .............................................................. 29 OSD Disabled ................................................................................ 3 Programming .............................................................................. 29 OSD Enabled ................................................................................. 4 AC Coupling of Inputs .............................................................. 29 Timing Characteristics (Serial Mode) ....................................... 5 On-Screen Display (OSD) ......................................................... 31 Absolute Maximum Ratings ............................................................ 7 Decoupling .................................................................................. 31 Thermal Resistance ...................................................................... 7 Power Dissipation....................................................................... 31 Power Dissipation ......................................................................... 7 Crosstalk ...................................................................................... 32 ESD Caution .................................................................................. 7 PCB Termination Layout........................................................... 34 Pin Configuration and Function Descriptions ............................. 8 Outline Dimensions ....................................................................... 36 Truth Table and Logic Diagram ............................................... 11 Ordering Guide .......................................................................... 36 REVISION HISTORY 10/08Revision 0: Initial Version Rev. 0 Page 2 of 36