10-Bit, 4 Oversampling SDTV Video Decoder Data Sheet ADV7180 BFEA71 TURES 91BAPPLICATIONS Qualified for automotive applications Digital camcorders and PDAs Worldwide NTSC/PAL/SECAM color demodulation support Low cost SDTV PIP decoders for digital TVs One 10-bit ADC, 4 oversampling for CVBS, 2 oversampling Multichannel DVRs for video security for Y/C mode, and 2 oversampling for YPrPb (per channel) AV receivers and video transcoding 3 video input channels with on-chip antialiasing filter PCI-/USB-based video capture and TV tuner cards CVBS (composite), Y/C (S-Video), and YPrPb (component) Personal media players and recorders video input support Smartphone/multimedia handsets 5-line adaptive comb filters and CTI/DNR video In-car/automotive infotainment units enhancement Rearview camera/vehicle safety systems Mini-TBC functionality provided by adaptive digital line 20BFUNCTIONAL BLOCK DIAGRAM length tracking (ADLLT), signal processing, and enhanced FIFO management CLOCK PROCESSING BLOCK XTAL1 LLC Integrated AGC with adaptive peak white mode XTAL PLL ADLLT PROCESSING Macrovision copy protection detection 2 ANALOG 8-BIT/16-BIT VIDEO PIXEL DATA DIGITAL NTSC/PAL/SECAM autodetection 10-BIT, 86MHz INPUTS PROCESSING ADC P15 TO P0 1 BLOCK A 1 8-bit ITU-R BT.656 YCrCb 4:2:2 output and HS, VS, and FIELD IN AA FILTER A 2 2D COMB IN VS 1.0 V analog input signal range A 3 IN AA SHA A/D HS FILTER 1 VBI SLICER A 4 IN Full-featured VBI data slicer with teletext support (WST) 3 FIELD 1 A 5 IN AA 5 COLOR GPO FILTER Power-down mode and ultralow sleep mode current 1 A 6 DEMOD IN SFL 2 2-wire serial MPU interface (I C compatible) INTRQ 2 REFERENCE I C/CONTROL Single 1.8 V supply possible ADV7180 1.8 V analog, 1.8 V PLL, 1.8 V digital, 1.8 V to 3.3 V I/O supply 4 SCLK SDATA ALSB RESET PWRDWN 10C to +70C commercial temperature grade 1 ONLY AVAILABLE ON 64-LEAD PACKAGE AND 48-LEAD PACKAGES. 2 40C to +85C industrial/automotive qualified temperature 16-BIT ONLY AVAILABLE ON 64-LEAD PACKAGE. 3 48-LEAD, 40-LEAD, AND 32-LEAD PACKAGE USES ONE LEAD FOR VS/FIELD. 4 NOT AVAILABLE ON 32-LEAD PACKAGE. grade 5 ONLY AVAILABLE ON 48-LEAD AND 64-LEAD PACKAGES. 40C to +125C temperature grade for automotive qualified Figure 1. 4 package types video performance for consumer applications with true 8-bit 64-lead, 10 mm 10 mm, RoHS compliant LQFP data resolution. Three analog video input channels accept standard 48-Lead, 7 mm 7 mm, RoHS compliant LQFP composite, S-Video, or component video signals, supporting a 40-lead, 6 mm 6 mm, RoHS compliant LFCSP wide range of consumer video sources. AGC and clamp-restore 32-lead, 5 mm 5 mm, RoHS compliant LFCSP circuitry allow an input video signal peak-to-peak range to 1.0 V. Alternatively, these can be bypassed for manual settings. 18BGENERAL DESCRIPTION The line-locked clock output allows the output data rate, timing The ADV7180 automatically detects and converts standard signals, and output clock signals to be synchronous, asynchronous, analog baseband television signals compatible with worldwide or line locked even with 5% line length variation. Output NTSC, PAL, and SECAM standards into 4:2:2 component video control signals allow glueless interface connections in many data compatible with the 8-bit ITU-R BT.656 interface standard. applications. The ADV7180 is programmed via a 2-wire, serial The simple digital output interface connects gluelessly to a wide 2 bidirectional port (I C-compatible) and is fabricated in a 1.8 V range of MPEG encoders, codecs, mobile video processors, and CMOS process. Its monolithic CMOS construction ensures greater Analog Devices, Inc., digital video encoders, such as the ADV7391. functionality with lower power dissipation. LFCSP package options External HS, VS, and FIELD signals provide timing references make the decoder ideal for space-constrained portable applications. for LCD controllers and other video ASICs, if required. Accurate The 64-lead LQFP package is pin compatible with the ADV7181C. 10-bit analog-to-digital conversion provides professional quality 1 The 48-Lead LQFP, 40-lead LFCSP, and 32-lead LFCSP use one pin to output VS or FIELD. Rev. J Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2006-2015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. MUX BLOCK OUTPUT BLOCK FIFO 05700-001ADV7180 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Video Processor .............................................................................. 26 General Description ......................................................................... 1 SD Luma Path ............................................................................. 26 Applications ....................................................................................... 1 SD Chroma Path ......................................................................... 26 Functional Block Diagram .............................................................. 1 Sync Processing .......................................................................... 27 Revision History ............................................................................... 3 VBI Data Recovery ..................................................................... 27 Introduction ...................................................................................... 5 General Setup .............................................................................. 27 Analog Front End ......................................................................... 5 Color Controls ............................................................................ 29 Standard Definition Processor ................................................... 5 Clamp Operation ........................................................................ 31 Functional Block Diagrams ............................................................. 6 Luma Filter .................................................................................. 32 Specifications ..................................................................................... 8 Chroma Filter .............................................................................. 35 Electrical Characteristics ............................................................. 8 Gain Operation ........................................................................... 36 Video Specifications ..................................................................... 9 Chroma Transient Improvement (CTI) .................................. 40 Timing Specifications ................................................................ 10 Digital Noise Reduction (DNR) and Luma Peaking Filter ... 41 Analog Specifications ................................................................. 11 Comb Filters ................................................................................ 42 Thermal Specifications .............................................................. 11 IF Filter Compensation ............................................................. 44 Absolute Maximum Ratings .......................................................... 12 AV Code Insertion and Controls ............................................. 45 ESD Caution ................................................................................ 12 Synchronization Output Signals ............................................... 47 Pin Configurations and Function Descriptions ......................... 13 Sync Processing .......................................................................... 54 32-Lead LFCSP ........................................................................... 13 VBI Data Decode ....................................................................... 54 2 40-Lead LFCSP ........................................................................... 14 I C Readback Registers .............................................................. 63 64-Lead LQFP ............................................................................. 15 Pixel Port Configuration ............................................................... 76 48-Lead LQFP ............................................................................. 17 GPO Control ................................................................................... 77 Power Supply Sequencing .............................................................. 18 MPU Port Description ................................................................... 78 Power-Up Sequence ................................................................... 18 Register Access ............................................................................ 79 Power-Down Sequence .............................................................. 18 Register Programming ............................................................... 79 2 Universal Power Supply ............................................................. 18 I C Sequencer .............................................................................. 79 2 Analog Front End ........................................................................... 19 I C Register Maps ........................................................................... 80 Input Configuration ................................................................... 20 PCB Layout Recommendations .................................................. 107 Analog Input Muxing ................................................................ 21 Analog Interface Inputs ........................................................... 107 Antialiasing Filters ..................................................................... 22 Power Supply Decoupling ....................................................... 107 Global Control Registers ............................................................... 23 PLL ............................................................................................. 107 Power-Saving Modes .................................................................. 23 VREFN and VREFP ................................................................. 107 Reset Control .............................................................................. 23 Digital Outputs (Both Data and Clocks) .............................. 107 Global Pin Control ..................................................................... 23 Digital Inputs ............................................................................ 107 Global Status Register .................................................................... 25 Typical Circuit Connection ......................................................... 108 Identification ............................................................................... 25 Outline Dimensions ..................................................................... 112 Status 1 ......................................................................................... 25 Ordering Guide ........................................................................ 114 Autodetection Result .................................................................. 25 Automotive Products ............................................................... 114 Status 2 ......................................................................................... 25 Status 3 ......................................................................................... 25 Rev. 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