Dual HDMI Fast Switching Receiver with 12-Bit, 170 MHz Video and Graphics Digitizer and 3D Comb Filter Decoder ADV7842 FEATURES Vertical peaking and horizontal peaking filters Robust synchronization extraction for poor video source Dual HDMI 1.4a fast switching receiver Advanced VBI data slicer HDMI support General 3D TV support Highly flexible 36-bit pixel output interface Content type bits Internal EDID RAM for HDMI and graphics CEC 1.4-compatible Dual STDI (standard identification) function support Extended colorimetry Any-to-any, 3 3 color space conversion (CSC) matrix 256-ball, 17 mm 17 mm BGA package 2 programmable interrupt request output pins HDMI 225 MHz receiver Simultaneous analog processing and HDMI monitoring Xpressview fast switching of HDMI ports 3D video format support including frame packing 1080p APPLICATIONS 24 Hz, 720p 50 Hz, 720p 60 Hz Advanced TVs Full colorimetry support including sYCC601, Adobe RGB, PDP HDTVs, LCD TVs (HDTV ready) Adobe YCC 601 LCD/DLP rear projection HDTVs 36-/30-bit Deep Color and 24-bit color support CRT HDTVs, LCoS HDTVs HDCP 1.4 support with internal HDCP keys AVR video receivers Adaptive HDMI equalizer LCD/DLP front projectors Integrated CEC controller HDTV STBs with PVR HDMI repeater support Projectors 5 V detect and hot plug assert for each HDMI port HDMI audio support including HBR and DSD FUNCTIONAL BLOCK DIAGRAM Advanced audio mute feature SDRAM Flexible digital audio output interfaces SCART CVBS CVBS 48 Supports up to 5 S/PDIF outputs 2 Supports up to 4 I S outputs SCART RGB CVBS ADC + CVBS HS/VS Video and graphics digitizer SDP SCART G CVBS FIELD/DE ADC CVBS Four 170 MHz, 12-bit ADCs 3D YC SCART B CLK HS/VS S-VIDEO 12-channel analog input mux YC ADC SCART DATA FIELD/DE SCART R 525i-/625i-component analog input SD/PS ADC YPbPr 525p-/625p-component progressive scan support CLK CP HS/VS Y/G 720p-/1080i-/1080p-component HDTV support YPbPr FIELD/DE 36-BIT HD YPbPr 525p/625p YCbCr/RGB Pb/B Low refresh rates (24 Hz/25 Hz/30 Hz) support for 720p/1080i GRAPHICS CLK RGB 1080p/ 720p/1080p Pr/R DATA UXGA Digitizes RGB graphics up to 1600 1200 at 60 Hz (UXGA) RGB 36 SCART fast blank support 2 I S HDMI 1 4 TMDS 3D video decoder DDC AUDIO S/PDIF DEEP OUTPUT 5 COLOR HDMI 2 NTSC/PAL/SECAM color standards support TMDS DSD HDMI Rx DDC HBR MCLK NTSC/PAL 2D/3D motion detecting comb filter MCLK Advanced time-base correction (TBC) with frame FAST SCLK SCLK SWITCH synchronization HDCP TO AUDIO KEYS ADV7842 Interlaced-to-progressive conversion for 525i and 625i PROCESSOR IF compensation filters Figure 1. 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INPUT MUX OUTPUT MUX OUTPUT MUX 08849-001ADV7842 TABLE OF CONTENTS Features .............................................................................................. 1 Power-Up Sequence ................................................................... 12 Applications ....................................................................................... 1 Power-Down Sequence .............................................................. 12 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ........................... 13 Revision History ............................................................................... 2 Functional Overview ...................................................................... 20 General Description ......................................................................... 3 HDMI Receiver ........................................................................... 20 Detailed Functional Block Diagram .............................................. 4 Analog Front End ....................................................................... 20 Specif icat ions ..................................................................................... 5 Standard Definition Processor ................................................. 21 Electrical Characteristics ............................................................. 5 Component Processor ............................................................... 21 Power Specifications .................................................................... 6 Other Features ............................................................................ 22 Analog Specifications ................................................................... 8 External Memory Requirements .................................................. 23 Video Specifications ..................................................................... 8 Single Data Rate (SDR) .............................................................. 23 Timing Characteristics ................................................................ 9 Double Data Rate (DDR) .......................................................... 23 Timing Diagrams ........................................................................ 10 Pixel Input/Output Formatting .................................................... 24 Absolute Maximum Ratings .......................................................... 11 Pixel Data Output Modes Features .......................................... 24 Package Thermal Performance ................................................. 11 Register Map Architecture ............................................................ 25 ESD Caution ................................................................................ 11 Outline Dimensions ....................................................................... 26 Power Supply Sequencing .............................................................. 12 Ordering Guide .......................................................................... 26 REVISION HISTORY 1/11Rev. SpA to Rev. B Updated Revision Number ................................................ Universal Updated Publication Code ............................................................ 28 10/10Rev. Sp0 to Rev. SpA Changes to Product Title and Features Section ............................ 1 Changes to Note 1, Table 1 ....................................................................... 5 Added Note 1, Table 5 ............................................................................... 9 Changes to Pin No. C11 Description, Table 7 .................................... 14 Changes to Pin No. N11 Description, Table 7 and Pin No. P11 Description, Table 7 ................................................................................. 18 6/10Revision Sp0: Initial Version Rev. B Page 2 of 28