X-On Electronics has gained recognition as a prominent supplier of EVAL-ADF7023DB2Z Sub-GHz Development Tools across the USA, India, Europe, Australia, and various other global locations. EVAL-ADF7023DB2Z Sub-GHz Development Tools are a product manufactured by Analog Devices. We provide cost-effective solutions for Sub-GHz Development Tools, ensuring timely deliveries around the world.

EVAL-ADF7023DB2Z Analog Devices

EVAL-ADF7023DB2Z electronic component of Analog Devices
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Part No.EVAL-ADF7023DB2Z
Manufacturer: Analog Devices
Category: Sub-GHz Development Tools
Description: Sub-GHz Development Tools Daughter Card, 868/915MHz combined match
Datasheet: EVAL-ADF7023DB2Z Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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1: USD 159.2495 ea
Line Total: USD 159.25 
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MOQ: 1  Multiples: 1
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Ship by Thu. 28 Nov to Wed. 04 Dec
MOQ : 1
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1 : USD 256.115

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Ship by Tue. 26 Nov to Thu. 28 Nov
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Multiples : 1
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We are delighted to provide the EVAL-ADF7023DB2Z from our Sub-GHz Development Tools category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the EVAL-ADF7023DB2Z and other electronic components in the Sub-GHz Development Tools category and beyond.

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High Performance, Low Power, ISM Band FSK/GFSK/OOK/MSK/GMSK Transceiver IC Data Sheet ADF7023 FEATURES Smart wake mode Current saving low power mode with autonomous receiver Ultralow power, high performance transceiver wake up, carrier sense, and packet reception Frequency bands Downloadable firmware modules 862 MHz to 928 MHz Image rejection calibration, fully automated (patent pending) 431 MHz to 464 MHz 128-bit AES encryption/decryption with hardware Data rates supported acceleration and key sizes of 128 bits, 192 bits, and 1 kbps to 300 kbps 256 bits 2.2 V to 3.6 V power supply Reed Solomon error correction with hardware acceleration Single-ended and differential PAs 240-byte packet buffer for TX/RX data Low IF receiver with programmable IF bandwidths Efficient SPI control interface with block read/write access 100 kHz, 150 kHz, 200 kHz, 300 kHz Integrated battery alarm and temperature sensor Receiver sensitivity (BER) Integrated RC and 32.768 kHz crystal oscillator 116 dBm at 1.0 kbps, 2FSK, GFSK On-chip, 8-bit ADC 107.5 dBm at 38.4 kbps, 2FSK, GFSK 5 mm 5 mm, 32-pin, LFCSP package 102.5 dBm at 150 kbps, GFSK, GMSK 100 dBm at 300 kbps, GFSK, GMSK APPLICATIONS 104 dBm at 19.2 kbps, OOK Smart metering Very low power consumption IEEE 802.15.4g 12.8 mA in PHY RX mode (maximum front-end gain) Wireless MBUS 24.1 mA in PHY TX mode (10 dBm output, single-ended PA) Home automation 0.75 A in PHY SLEEP mode (32 kHz RC oscillator active) Process and building control 1.28 A in PHY SLEEP mode (32 kHz XTAL oscillator active) Wireless sensor networks (WSNs) 0.33 A in PHY SLEEP mode (Deep Sleep Mode 1) Wireless healthcare RF output power of 20 dBm to +13.5 dBm (single-ended PA) RF output power of 20 dBm to +10 dBm (differential PA) Patented fast settling automatic frequency control (AFC) Digital received signal strength indication (RSSI) Integrated PLL loop filter and Tx/Rx switch Fast automatic VCO calibration Automatic synthesizer bandwidth optimization On-chip, low-power, custom 8-bit processor Radio control Packet management Smart wake mode Packet management support Highly flexible for a wide range of packet formats Insertion/detection of preamble/sync word/CRC/address Manchester and 8b/10b data encoding and decoding Data whitening Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 20102012 Analog Devices, Inc. All rights reserved. ADF7023 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interrupts in Sport Mode .......................................................... 53 Applications ....................................................................................... 1 ADF7023 Memory Map ................................................................ 54 Revision History ............................................................................... 3 BBRAM ........................................................................................ 54 Functional Block Diagram .............................................................. 4 Modem Configuration RAM (MCR) ...................................... 54 General Description ......................................................................... 4 Program ROM ............................................................................ 54 Specifications ..................................................................................... 6 Program RAM ............................................................................ 54 RF and Synthesizer Specifications .............................................. 6 Packet RAM ................................................................................ 55 Transmitter Specifications ........................................................... 7 SPI Interface .................................................................................... 56 Receiver Specifications ................................................................ 9 General Characteristics ............................................................. 56 Timing and Digital Specifications ............................................ 13 Command Access ....................................................................... 56 Auxilary Block Specifications ................................................... 14 Status Word ................................................................................. 56 General Specifications ............................................................... 15 Command Queuing ................................................................... 57 Timing Specifications ................................................................ 16 Memory Access ........................................................................... 58 Absolute Maximum Ratings .......................................................... 17 Low Power Modes .......................................................................... 61 ESD Caution ................................................................................ 17 Example Low Power Modes ...................................................... 64 Pin Configuration and Function Descriptions ........................... 18 Low Power Mode Timing Diagrams ........................................ 66 Typical Performance Characteristics ........................................... 20 WUC Setup ................................................................................. 67 Terminology .................................................................................... 32 Firmware Timer Setup ............................................................... 69 Radio Control .................................................................................. 33 Calibrating the RC Oscillator ................................................... 69 Radio States ................................................................................. 33 Downloadable Firmware Modules ............................................... 71 Initialization ................................................................................ 35 Writing a Module to Program RAM ........................................ 71 Commands .................................................................................. 35 Image Rejection Calibration Module ...................................... 71 Automatic State Transitions ...................................................... 37 Reed Solomon Coding Module ................................................ 71 State Transition and Command Timing .................................. 38 AES Encryption and Decryption Module............................... 71 Packet Mode .................................................................................... 43 Radio Blocks .................................................................................... 73 Preamble ...................................................................................... 43 Frequency Synthesizer ............................................................... 73 Sync Word ................................................................................... 44 Crystal Oscillator ........................................................................ 74 Payload ......................................................................................... 45 Modulation .................................................................................. 74 CRC .............................................................................................. 46 RF Output Stage.......................................................................... 74 Postamble..................................................................................... 47 PA/LNA Interface ....................................................................... 75 Transmit Packet Timing ............................................................ 47 Receive Channel Filter ............................................................... 75 Data Whitening .......................................................................... 48 Image Channel Rejection .......................................................... 75 Manchester Encoding ................................................................ 48 Automatic Gain Control (AGC) ............................................... 75 8b/10b Encoding ........................................................................ 48 RSSI .............................................................................................. 76 Sport Mode ...................................................................................... 49 2FSK/GFSK/MSK/GMSK Demodulation ............................... 78 Packet Structure in Sport Mode ............................................... 49 Clock Recovery ........................................................................... 80 Sport Mode in Transmit ............................................................ 49 OOK Demodulation .................................................................. 80 Sport Mode in Receive ............................................................... 49 Recommended Receiver Settings for 2FSK/GFSK/MSK/GMSK ......................................................... 81 Transmit Bit Latencies in Sport Mode ..................................... 49 Recommended Receiver Settings for OOK ............................ 82 Interrupt Generation ...................................................................... 52 Rev. C Page 2 of 112

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