78.C2GCM.AT30C Apacer

Apacer Memory Product Specification 8GB DDR3 SDRAM SODIMM with SPD Ordering Information Component Number of Part Number Bandwidth Speed Grade Max Frequency CAS Latency Density Organization Composition Rank 78.C2GCM.AT30C 10.6GB/sec 1333Mbps 666MHz CL9 8GB 1024Mx64 512Mx8*16EA 2 Specifications Features On Dimm Thermal Sensor: No Double-data-rate architecture two data transfers per clock cycle Density: 8GB The high-speed data transfer is realized by the 8 bits Organization prefetch pipelined architecture 1024M words 64 bits, 2 ranks Bi-directional differential data strobe (DQS and /DQS) 4G Mounting 16 pieces of bits DDR3 SDRAM sealed is transmitted/received with data for capturing data at in FBGA the receiver Package: 204-pin socket type small outline dual in DQS is edge-aligned with data for READs center- line memory module (SO-DIMM) aligned with data for WRITEs PCB height: 30.0mm Differential clock inputs (CK and /CK) Lead pitch: 0.6mm (pin) DLL aligns DQ and DQS transitions with CK Lead-free (RoHS compliant) transitions Power supply: VDD = 1.5V 0.075V Commands entered on each positive CK edge data and data mask referenced to both edges of DQS Eight internal banks for concurrent operation (components) Data mask (DM) for write data Interface: SSTL 15 Posted /CAS by programmable additive latency for Burst lengths (BL): 8 and 4 with Burst Chop (BC) better command and data bus efficiency /CAS Latency (CL): 6, 7, 8, 9 On-Die-Termination (ODT) for better signal quality Synchronous ODT /CAS write latency (CWL): 5, 6, 7 Dynamic ODT Precharge: auto precharge option for each burst access Asynchronous ODT Refresh: auto-refresh, self-refresh Multi Purpose Register (MPR) for temperature read Refresh cycles out Average refresh period ZQ calibration for DQ drive and ODT 7.8 s at 0C TC +85C Programmable Partial Array Self-Refresh (PASR) 3.9 s at +85C < TC +95C /RESET pin for Power-up sequence and reset Operating case temperature range function TC = 0C to +95C SRT range: Normal/extended Auto/manual self-refresh Programmable Output driver impedance control Apacer Memory Product Specification Pin Configurations Front side 1 pin 71 pin 73 pin 203 pin 2 pin 72 pin 74 pin 204 pin Back side Front side Back side Pin No. Pin name Pin No. Pin name Pin No. Pin name Pin No. Pin name 1 VREFDQ 103 /CK0 2 VSS 104 /CK1 3 VSS 105 VDD 4 DQ4 106 VDD 5 DQ0 107 A10 (AP) 6 DQ5 108 BA1 7 DQ1 109 BA0 8 VSS 110 /RAS 9 VSS 111 VDD 10 /DQS0 112 VDD 11 DM0 113 /WE 12 DQS0 114 /CS0 13 VSS 115 /CAS 14 VSS 116 ODT0 15 DQ2 117 VDD 16 DQ6 118 VDD 17 DQ3 119 A13 18 DQ7 120 ODT1 19 VSS 121 /CS1 20 VSS 122 NC 21 DQ8 123 VDD 22 DQ12 124 VDD 23 DQ9 125 NC 24 DQ13 126 VREFCA 25 VSS 127 VSS 26 VSS 128 VSS 27 /DQS1 129 DQ32 28 DM1 130 DQ36 29 DQS1 131 DQ33 30 /RESET 132 DQ37 31 VSS 133 VSS 32 VSS 134 VSS 33 DQ10 135 /DQS4 34 DQ14 136 DM4 35 DQ11 137 DQS4 36 DQ15 138 VSS 37 VSS 139 VSS 38 VSS 140 DQ38 39 DQ16 141 DQ34 40 DQ20 142 DQ39 41 DQ17 143 DQ35 42 DQ21 144 VSS 43 VSS 145 VSS 44 VSS 146 DQ44 45 /DQS2 147 DQ40 46 DM2 148 DQ45 47 DQS2 149 DQ41 48 VSS 150 VSS 49 VSS 151 VSS 50 DQ22 152 /DQS5 51 DQ18 153 DM5 52 DQ23 154 DQS5 53 DQ19 155 VSS 54 VSS 156 VSS 55 VSS 157 DQ42 56 DQ28 158 DQ46 57 DQ24 159 DQ43 58 DQ29 160 DQ47 59 DQ25 161 VSS 60 VSS 162 VSS 61 VSS 163 DQ48 62 /DQS3 164 DQ52 63 DM3 165 DQ49 64 DQS3 166 DQ53 65 VSS 167 VSS 66 VSS 168 VSS 67 DQ26 169 /DQS6 68 DQ30 170 DM6