AS3004101-0050X0ISAY Avalanche Technology

1Mbit 16Mbit SPI P-SRAM Memory SPI Serial Persistent SRAM Memory (AS3001401, AS3004401, AS3008401, AS3016401) Features Interface Serial Peripheral Interface SPI, up to Packages 50MHz clock rate 8-pad WSON (5.0mm x 6.0mm) 8-pin SOIC (5.2mm x 5.2mm) Technology 40nm pMTJ STT-MRAM Data Protection Virtually unlimited Data Endurance and Hardware Based Data Retention (see Endurance & Write Protect Pin (WP ) Retention on page 20) Software Based Address Range Selectable through Density 1Mb, 4Mb, 8Mb, 16Mb Configuration bits (Top/Bottom, Block Protect 2:0 ) Operating Voltage Range Supports JEDEC Reset VCC: 2.70V 3.60V Operating Temperature Range RoHS & REACH Compliant Industrial: -40C to 85C Industrial Plus: -40C to 105C Performance Device Operation Typical Values Units Frequency of Operation 50 (maximum) MHz Standby Current 160 (typical) A Deep Power Down Current 5 (typical) A Active Read Current (1-1-1) 50MHz 8 (typical) mA Active Write Current (1-1-1) 50MHz 14 (typical) mA R e v i s i o n : B A v a l a n c h e T e c h n o l o g y P a g e 1 31 1Mbit 16Mbit SPI P-SRAM Memory Table of Contents Features .................................................................................................................................... 1 Performance ............................................................................................................................. 1 Table of Contents ..................................................................................................................... 2 General Description ................................................................................................................. 3 Ordering Options ..................................................................................................................... 4 Valid Combinations Standard ...................................................................................................... 5 Signal Description and Assignment ....................................................................................... 6 Package Options ...................................................................................................................... 7 8-Pad WSON (Top View) ..................................................................................................................... 7 8-Pin SOIC (Top View) ......................................................................................................................... 7 Package Drawings ................................................................................................................... 8 8-Pad WSON .......................................................................................................................................... 8 8-Pin SOIC .............................................................................................................................................. 9 Architecture .............................................................................................................................10 Device Initialization .................................................................................................................12 Memory Map ............................................................................................................................13 Register Map ...........................................................................................................................14 Status Register / Device Protection Register (Read/Write) ........................................................... 14 Device Identification Register (Read Only) ...................................................................................... 16 Instruction Set .........................................................................................................................17 Instruction Description and Structures .................................................................................18 Electrical Specifications .........................................................................................................20 CS Operation & Timing ................................................................................................................... 23 Data Output Operation & Timing .................................................................................................... 25 WP Operation & Timing .................................................................................................................. 26 Product Use Limitations .........................................................................................................30 Limited Warranty ................................................................................... Error Bookmark not defined. Revision History ......................................................................................................................31 R e v i s i o n : B A v a l a n c h e T e c h n o l o g y P a g e 2 31