QUICK Blackhawk JTAG Signal Analysis START Adaptive Clocking Probing TCK and RTCK GUIDE The output (TCK) and return (RTCK) test Kit for OMAP clocks are easily accessible via the target boards JTAG header on pin 11 (TCK) and pin 9 (RTCK). Attaching oscilloscope probes to these pins will give you the ability to view Overview the clock synchronization with and without the The JTAG Adaptive Clocking Kit (JACK), shown in adapter in place. figure 1, is designed to allow JTAG emulators for TI DSPs to synchronize with the adaptive clocking cores Figure 6 below shows the output of the test of Texas Instruments OMAP devices providing com- clock signals using an emulator that does not plete data integrity and increased performance. handle the adaptive clocking feature of the TI OMAP cores. Figure 1 - JACK hardware What is Adaptive Clocking For this example, measurements were made Part No. BH-EMU-JACK Adaptive clocking is a feature of synthesizable cores, with the emulator connected to an OSK5912 Figure 6Non-adaptive clocking Emulator introduced by ARM Ltd. and adopted by TI in their as the target board. You can see that the OMAP platform, wherein the input test clock (TCK) is delayed and synchronized with the core clock clocks are not synchronized, which can lead before producing the output clock (RTCK). Emulators need to adapt to this changing RTCK signal. to data corruption and reduced performance. During this delay (synchronizing period) the target core samples Test Data In (TDI), Test Mode Figure 7 shows the output from the same Select (TMS), and TCK with the core clock. This delay is variable and changes in real time, which clock signals, using the same emulator con- can cause data corruption. nected to the same OSK5912 target board. Figure 2 shows an example of this The only difference is that we inserted the synchronizing mechanism inside the JACK between the target boards JTAG OMAP processor core. Here you can header and the JTAG connector of the emula- see the multi-stage synchronizer tor. consisting of several D-triggers, which is dependant on the core clock This shows that, without changing the emula- rate. tor, target board, or any settings, the clock edges are fully synchronized. The TCK sig- Figure 3 illustrates the JACK logic to nal is adapting to the changes in RTCK from Figure 7Adaptive Clocking Emulator handle these real time changes to the OMAP devices core clock. Figure 2OMAP Adaptive Clocking Mechanism RTCK. The resulting logic will main- tains synchronization with the JTAG signals as the rate of the OMAP core Solving the TRST Issue with the TI XDS510 clock changes. XDS510-class emulators that depend on the TI SN74ACT8990 test bus controller (TBC) to assert the TRST signal are susceptible to a dead-lock condition with certain OMAP cores that stop You may find emulator release notes RTCK when TRST is asserted. Because these cores stop RTCK, the TBC enters a suspended that describe setup changes state, never updates, and will not clear the asserted TRST signal. (workarounds) that are necessary to operate with these TI OMAP adaptive To solve this issue, the adapter board will route TCK to RTCK if it detects RTCK has stopped clocking cores. This usually involves when TRST is asserted (see Figure 3). You will find that the TI XDS510 ISA card and other TBC- decreasing the output TCK rate of the based emulators will now work with all OMAP devices when this adapter kit is being used. emulator. While this may seem to correct the problem, the data and XDS560-class emulators, which do not rely on the TBC for asserting TRST, will not be affected by clock signals will still not be synchro- the JACKs TRST logic. nized with the OMAP core clock and you will only decrease performance. Figure 3JACK Adaptive Clocking Logic Blackhawk 123 Gaither Drive Mt. Laurel, NJ 08054-1701 Compatibility www.blackhawk-dsp.com +1-877-983-4514 This JACK is designed to be compatible with the traditional 14-pin emulators supporting the com- mon JTAG functions and signals. This includes XDS510-class and XDS560-class emulators. Blackhawk is a registered trademark of EWA Technologies, Inc. The JACK will also work when connected to non-adaptive clocking targets. BH-Jack-QS-01 4 1 Installation Maximizing Performance Optimization Orientation Using the JACK does not require any changes to your emulator or CCStudio setup. The adapter The JACK is keyed (pin 6), but care should be taken when connecting it to a target board JTAG will automatically synchronize the JTAG data and clocks for increased stability and data integrity. header or emulator. Pin 1 of the JACK socket should align with pin 1 on the target board header. However, to maximize performance, you should set your emulator to generate its maximum TCK Figure 4 shows the JACK connected to a target boards JTAG header. The emulator can now be frequency, if applicable. Increasing your emulators TCK output rate will not affect data integrity. connected to the JACK in the same manner it would normally be connected to the target board. Below is a description covering some of the popular TI JTAG emulators and how you can optimize your configuration for maximum performance. WARNING Fixed TCK Emulators If the JACK is installed incorrectly, damage can occur Emulators that have a fixed TCK rate are typically XDS510-class and generate a TCK fre- to the target board, emulator, and adapter. The quency between 10 or 12 MHz (please consult your emulators documentation for the correct adapter is keyed, and so should the emulators con- specifications on your emulator). These fixed TCK emulators, such as most XDS510 ISA, Par- nector and target board header. allel Port, and USB versions, do not require any changes to get the benefits from the JTAG Be sure to align connections correctly, with no power Adaptive Clocking Kit. applied to the emulator or target board. Just insert the JACK between the 14-pin JTAG connectors of the emulator and target board. The JACK is NOT hot-pluggable Then setup and start CCS as you would normally and the adapter board will automatically syn- chronize the TCK, TCK RET, and data signals. Figure 4JACK connected to a Variable TCK Capable Emulators target boards JTAG header Emulators that support variable TCK frequencies, such as the Blackhawk USB510 and PCI510 JTAG models, as well as all XDS560-class emulators, can also be used without changes. Optional Configurations However, these emulators typi- The JACK ships with an additional right-angle connector, pictured in options 1 and 2. cally support TCK rates well This connector is also keyed to match the standard TI 14-pin JTAG header. The right above 10 MHz. So you can con- angle connector is provided to allow two additional configurations where the straight, figure them to generate their vertical connection will not work. highest TCK rate possible to yield maximum performance. TCK Each right-angle option can be easily configured by attaching the right-angle connec- frequencies are usually set with a tor to a different end of the JACK. Options 1 and 2, pictured here, show the different configuration parameter (i.e. in orientations that are possible and highlights how the right angle connecter should be CCSetup), but please refer to attached the JACK. your emulators documentation on how to set a maximum TCK If the right-angle connector is attached, the rate. Figure 5 shows how to resulting JACK will have a keyed socket to change the setting for an attach to a target board, and keyed header XDS560-class emulator from the where the emulator can be attached. Option 1 Connection Properties dialog in Option 2 CCStudio v3.1 setup. If you are using an OMAP device Mechanical Considerations and have been instructed to slow The JACK hardware was designed using quality compo- down the TCK rate of the emula- Pin Name Pin Name nents, fast LVC logic, and an FR4 base-laminate material tor you are using, this work- suitable of supporting most legacy board designs and 1 TMS 2 TRST around will no longer be neces- speeds. sary. You can set it back to its Figure 5Setting the maximum TCK rate 3 TDI 4 TDIS original, maximum value. The The JACK has an impedance of approximately 50 ohms to data will be synchronized and performance will be back to its original speed. 5 TVD 6 KEY reduce the chance of mismatch with typical target boards. 7 TDO 8 GND DISCLAIMERS Table 1 provides the signal to pin relationship. These sig- Read the following for important information to be aware of when using this hardware. 9 RTCK 10 GND nals follow the standard TI JTAG layout recommendations. Blackhawk is not responsible for any damage that may occur to the JACK, target board, or emulator if misused, mishandled, or forced into place. 11 TCK 12 GND The header and socket on the JACK conform to the stan- The JACK is not intended to be hot pluggable, damage may occur. Make sure you emulator and target board dard 0.100 spacing in a double row configuration. are not powered when making connections. 13 EMU0 14 EMU1 The JACK is keyed (pin 6). Removing or modifying the JACKs connectors is not recommended or supported and can harm connected hardware. Table 1 - 14-pin JTAG Header 3 2 Pin-out