PRELIMINARY DATA SHEET BCM5222 10/100BASE-TX Dual-Port Tranceiver GENERAL DESCRIPTION FEATURES The BCM5222 is a dual-port, low-power, 10/100BASE-TX Dual Port 10/100BASE-TX IEEE 802.3u Fast Ethernet transceiver targeting a number of applications requiring in- Transceiver telligent power management and robust network toler- Power Consumption: <180 mW/port ance. The BCM5222 operates using a 1.8V and 3.3V Unique Energy Detection Circuit to Enable Intelligent supply. The devices contain two full-duplex 10BASE-T/ Power Management 100BASE-TX Fast Ethernet transceivers, which perform HP Auto-MDIX all of the physical layer interface functions for 10BASE-T Cable Length Indication Ethernet on CAT 3, 4, and 5 unshielded twisted pair (UTP) Cable Noise Level Indication cable and 100BASE-TX Fast Ethernet on CAT 5 UTP ca- Cable Length Greater than 140 meters ble. Well Under 10 PPM Defect Ratio Quality Industrial Temperature Range (-40 to 85C) The BCM5222 is a highly integrated solution combining a MII/7-wire serial interface digital adaptive equalizer, ADC, phase lock loop, line driv- IEEE 1149.1 (JTAG) Scan Chain Support er, encoder, decoder and all the required support circuitry MII Management Via Serial Port into a single monolithic CMOS chip. It complies fully with 100-pin PQFP and 100-pin fpBGA packages the IEEE 802.3u specification, including the Media Inde- pendent Interface (MII) and Auto-Negotiation subsections. APPLICATIONS The effective use of digital technology in the BCM5222 de- IP Phones sign results in robust performance over a broad range of Backplane Bus Communication operating scenarios. Problems inherent to mixed-signal Embedded Telecom implementations, such as analog offset and on-chip noise, Print Servers are eliminated by employing field proven digital adaptive equalization and digital clock recovery techniques. TXD 1:2 4 Multimode TXEN 1:2 TD 1:2 Xmt DAC TXER 1:2 10BASE-T PCS TXC 1:2 Auto Baseline MDIX Wander COL 1:2 Correction RXC 1:2 100BASE-TX PCS CRS 1:2 Digital RD 1:2 RXDV 1:2 ADC Adaptive Equalizer RXER 1:2 RXD 1:2 4 CRS/Link ACTLED 1:2 Auto-Negotiation Detection /Link Integrity LNKLED 1:2 LED SPDLED 1:2 Drivers FDXLED 1:2 Clock XTALO Clock Generator Recovery XTALI MODES Bias Generator RDAC MII MDC MII Mgmt Registers JTAG MDIO Control JTAG Test Logic 5 Figure 1: Functional Block Diagram 5222-DS01-R 16215 Alton Parkway P.O. Box 57013 Irvine, California 92619-7013 Phone: 949-450-8700 Fax: 949-450-8710 10/12/01REVISION HISTORY REVISION DATE CHANGE DESCRIPTION 5222-DS00-R 3/1/01 Initial Release 5222-DS01-R 10/12/01 Updated clock information. Broadcom Corporation P.O. Box 57013 16215 Alton Parkway Irvine, California 92619-7013 Copyright 2001 by Broadcom Corporation All rights reserved Printed in the U.S.A. Broadcom, the pulse logo, and QAMLink are registered trademarks of Broadcom Corporation and/or its subsidiaries in the United States and certain other countries. All other trademarks are the property of their respective owners.