USB Client Controller PCIe RC/EP USB 3382, PCI Express to USB 3.0 Peripheral Controller The USB 3382 is a PCI Express Gen 2 to USB 3.0 SuperSpeed Peripheral Features Controller. It features two PCI Express Gen 2 x1 ports and one USB 3.0- USB 3.0 Client Interface compliant client port. o Compliant to the USB 3.0 Specification o 1 upstream port High Performance and Flexibility o Supports SuperSpeed, Hi-Speed, The USB 3382 provides a matching bandwidth at 5 GTps Full-Speed modes between the PCI Express Gen 2 bus and the USB 3.0 o Four Descriptor-based DMA SuperSpeed bus. The controller can easily add a USB 3.0 client port to an channels for automatic data existing PCI Express system, as well as convert existing PCI Express functions transfers (endpoints) to a USB 3.0 product. The internal high performance switch can o Supports USB Duet configure the two PCI Express ports into one x1 upstream + one x1 downstream, Technology one x2 upstream, two x1 downstream, or one x2 downstream port. The o USB Auto-Enumeration flexibility allows different system configurations to achieve the maximum Technology performance of the product. o Support for Bulk, Isochronous, and Interrupt Endpoints o USB Power Management Abundant Software USB 3.0 link power As the successor of the gold standard NET 2280, PCI to USB 2.0 peripheral management states: U0, U1, controller, the USB 3382 can be used with existing NET 2280 software with no U2, U3 or minimal change. Driver stacks are already available in common OSs such as USB 2.0 link power Windows (XP, Vista, 7 and CE), Linux, and VxWorks. USB Duet software from management states: L0, L1, L2 PLX will provide the fastest PC interconnect at 400 mega bytes per second of PCI Express Interface transfer speed with just a simple USB cable. o PCI Express Gen 2 (5Gbps) o Electrical Compliance to PCI Express Base Specification r2.0 o Integrated root complex and 2 PCIe PHY 8051 I C SPI switch provides four configurations: one x1 upstream port and one x1 downstream port To USB Hi/FULL USB 2.0 PHY PCIe US/DS Port SPEED HOST one x2 upstream port USB IN FIFOs two x1 downstream ports Memory Based text one x2 downstream port Switch USB OUT FIFOs o Reference Clock Buffered To USB SUPER PCIe DS Port USB 3.0 PHY Output signals for downstream SPEED HOST ports (RC mode) o Low latency o PCI Express Power Management PCIe PHY DMA PLL All link power management states: L0, L0s, L1, L2, L2/L3 Ready, and L3 Device states: D0 and D3(hot & cold) Figure 1: USB 3382 Block Diagram Vaux, Wake , Beacon support o 256 byte maximum payload size Applications General Target applications for the USB 3382 as a PCI Express endpoint include PCs, o Four GPIO pins for maximum servers, docking stations, printers, and PCI Express embedded systems. The design flexibility main applications for the USB 3382 as a PCI Express root complex include 2 o I C configuration/control option WLAN dongles, graphics/video dongles, and HDTV tuners/codec. o 10mm x 10mm 136-pin aQFN package with 0.5 mm pitch o I-Temp support and Pb-free PLX Technology, www.plxtech.com Page 1 of 2 6/22/2012, Version 1.2 x1 x1 USB 3382, PCI Express to USB 3.0 Peripheral Controller Migrate PCI Express Endpoints to a USB 3.0 Add a USB 3.0 Client Port to PCI Express- Product Based Systems The USB 3382 is designed to easily convert existing PCI The USB 3382 can also be used to easily add a USB 3.0 Express endpoints/adapter cards to a standalone USB 3.0 client port to any PCI Express based embedded system. product. Figure 3: Combine the two PCI Express ports of the USB 3382 into one x2 PCI Express Gen 1 connection to maximize 5Gbps bandwidth Figure 2: Creating a multi-function USB 3.0 device with two PCI Express based wireless radios and the USB Development Tools 3382 PLX offers hardware and software tools to enable rapid customer design activity. These tools consist of a hardware Instead of a CPU configuring the PCI Express endpoint, module (USB 3382 RDK), hardware documentation the USB 3382 can itself act as the PCI Express Root (available at www.plxtech.com), and a Software Complex, with configuration information coming from its Development Kit. internal 8051 CPU or from the USB host. Auto- Enumeration Technology allows a standard USB host to Both USB host and peripheral-side software is included detect this new USB device even if no firmware has been with the USB 3382 RDK. The host-side software consists run. This means that firmware can actually be downloaded of USB drivers and test applications. The peripheral-side to the USB device after initial boot-up. firmware is used to configure the USB 3382 to resemble a standard USB class device (like a printer or mass storage The USB 3382 includes PCI Express clock and other device) for which no USB host drivers will need to be standard signals to compensate for features usually found written. For custom applications, firmware APIs are in a typical PCI Express Root Complex environment. The provided to abstract the USB transactions to reads and USB 3382 supports two pairs of buffered, 100 MHz HCSL writes. While this software is available for various output clocks, one pair for each downstream port when operating systems, it is written in standard C with configured in Adapter mode with one downstream port or portability in mind. in Root Complex mode (one or two downstream ports). Each clock output pair can be disabled by software or Product Ordering Information serial EEPROM when not in use, for additional power Part Number Description savings. This feature greatly reduces system BOM cost by USB3382-AB50NI G Two x1-port PCI Express Gen 2.0 to USB 3.0 2 SuperSpeed Peripheral Controller (10x10mm ) eliminating the need for extra clock buffers on the PCB. USB3382-AB-2U RDK USB3382 Rapid Development Kit + CM107 (one x2 upstream port) USB3382-AB-1U1D RDK USB3382 Rapid Development Kit + CM160 Shared memory in the USB 3382 functions as main (one x1 upstream, one x1 downstream) memory for holding descriptors or other control data. The USB3382-AB-1D RDK USB3382 Rapid Development Kit + CM110 integrated 8051 CPU can also be used to configure the (two x1 downstream ports, Root Complex Mode) device to resemble a standard USB class device (like a USB3382-AB-2D RDK USB3382 Rapid Development Kit + CM108 communications or video device) even if there is no local (one x2 downstream port, Root Complex Mode) intelligence on the peripheral. Visit www.plxtech.com for more information. PLX Technology, www.plxtech.com Page 2 of 2 6/22/2012, Version 1.2