UPA811T-T1-A CEL

BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT PB1007K REFERENCE FREQUENCY 16.368 MHz, 2nd IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER + PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER DESCRIPTION The PB1007K is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion RF block integrated Pre-Amplifier + RF/IF down-converter + PLL frequency synthesizer on 1 chip. This IC is lower current than the PB1005K and packaged in a 36-pin QFN package. This IC is manufactured using our 30 GHz fmax UHS0 (Ultra High Speed Process) silicon bipolar process. FEATURES Double conversion : fREFin = 16.368 MHz, f1stIFin = 61.380 MHz, f2ndIFin = 4.092 MHz Integrated RF block : Pre-Amplifier + RF/IF frequency down-converter + PLL frequency synthesizer Needless to input counter data : fixed division internal prescaler VCO side division : 200 ( 25, 8 serial prescaler) Reference division : 2 Supply voltage : VCC = 2.7 to 3.3 V Low current consumption : ICC = 25.0 mA TYP. VCC = 3.0 V Gain adjustable externally : Gain control voltage pin (control voltage up vs. gain down) On-chip pre-amplifier : GP = 15.5 dB TYP. f = 1.57542 GHz NF = 3.2 dB TYP. f = 1.57542 GHz Power-save function : Power-save dark current ICC(PD) = 5 A MAX. High-density surface mountable : 36-pin plastic QFN APPLICATIONS Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz (for general use) ORDERING INFORMATION Part Number Package Supplying Form PB1007K-E1-A 36-pin plastic QFN 12 mm wide embossed taping Pin 1 indicates pull-out direction of tape Qty 2.5 kpcs/reel Remark To order evaluation samples, contact your nearby sales office. Part number for sample order: PB1007K-A Caution Electro-static sensitive devices Document No. PU10014EJ02V0DS (2nd edition) The mark shows major revised points. Date Published February 2002 CP(K) NEC Compound Semiconductor Devices 2001, 2002 DISCONTINUEDPB1007K PRODUCT LINE-UP (TA = +25C, VCC = 3.0 V) Type Part Number Functions VCC ICC CG Package Status (Frequency unit: MHz) (V) (mA) (dB) Clock PB1007K Pre-amplifier + RF/IF 2.7 to 3.3 25.0 100 to 36-pin plastic QFN New Device Frequency down-converter + PLL 120 Specific synthesizer REF = 16.368 1 chip IC 1stIF = 61.380/2ndIF = 4.092 PB1005GS RF/IF down-converter 2.7 to 3.3 45.0 76 to 96 30-pin plastic SSOP Available + PLL synthesizer REF = 16.368 PB1005K 36-pin plastic QFN 1stIF = 61.380/2ndIF = 4.092 Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. To know the associated products, please refer to their latest data sheets. SYSTEM APPLICATION EXAMPLE GPS receiver RF block diagram PB1007K is in f0 = 1.023 MHz in the diagram 1540f0 60f0 4f0 2ndIFin1 BPF BPF BPF 2ndIFin2 RF-MIXout IF-MIXin VGC IF-MIXout 2ndIFbypass 2ndIF-Amp 4.092 MHz 1575.42 MHz Pre-Amp RF-MIX IF-MIX 4f0 from Buffer to Demdulator Antenna 64f0 8f0 16.368 MHz 16f0 1/25 1/8 PD 1/2 Buffer to Demdulator REF 1 600f0 CHARGE OSC PUMP 8f0 8f0 16f0 1stLO-OSC1 1stLO-OSC2 LOout REFout2 TCXO LOOP 16.368 MHz FILTER Caution This diagram schematically shows only the PB1007Ks internal functions on the system. This diagram does not present the actual application circuits. 2 Data Sheet PU10014EJ02V0DS DISCONTINUED