FDPC8014S PowerTrench Power Clip April 2014 FDPC8014S PowerTrench Power Clip 25V Asymmetric Dual N-Channel MOSFET Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max r = 3.8 m at V = 10 V, I = 20 A dual package. The switch node has been internally connected to DS(on) GS D enable easy placement and routing of synchronous buck Max r = 4.7 m at V = 4.5 V, I = 18 A DS(on) GS D converters. The control MOSFET (Q1) and synchronous Q2: N-Channel TM SyncFET (Q2) have been designed to provide optimal power Max r = 1.2 m at V = 10 V, I = 41 A DS(on) GS D efficiency. Max r = 1.4 m at V = 4.5 V, I = 37 A DS(on) GS D Applications Low inductance packaging shortens rise/fall times, resulting in Computing lower switching losses Communications MOSFET integration enables optimum layout for lower circuit inductance and reduced switch node General Purpose Point of Load ringing RoHS Compliant PAD10 PIN1 PIN1 V+(HSD) HSG LSG LSG HSG SW GR SW GR SW PAD9 GND(LSS) SW V+ V+ SW SW V+ SW V+ Bottom Top Power Clip 5X6 Pin Name Description Pin Name Description Pin Name Description 1 HSG High Side Gate 3,4,10 V+(HSD) High Side Drain 8 LSG Low Side Gate 2 GR Gate Return 5,6,7 SW Switching Node, Low Side Drain 9 GND(LSS) Low Side Source MOSFET Maximum Ratings T = 25 C unless otherwise noted A Symbol Parameter Q1 Q2 Units Note5 V Drain to Source Voltage 25 25 V DS V Gate to Source Voltage 12 12 V GS Drain Current -Continuous T = 25 C 60 110 C Note1a Note1b I -Continuous T = 25 C 20 41 A D A -Pulsed T = 25 C (Note 4) 75 160 A E Single Pulse Avalanche Energy (Note 3) 73 253 mJ AS Power Dissipation for Single Operation T = 25 C 21 42 C P W D Note1a Note1b Power Dissipation for Single Operation T = 25 C 2.1 2.3 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 6.0 3.0 JC Note1a Note1b R Thermal Resistance, Junction to Ambient 60 55 C/W JA Note1c Note1d R Thermal Resistance, Junction to Ambient 130 120 JA 2013 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDPC8014S Rev.C7 FDPC8014S PowerTrench Power Clip Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity 05OD/16OD FDPC8014S Power Clip 56 13 12 mm 3000 units Electrical Characteristics T = 25 C unless otherwise noted J Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics I = 250 A, V = 0 V Q1 25 D GS BV Drain to Source Breakdown Voltage V DSS I = 1 mA, V = 0 V Q2 25 D GS BV Breakdown Voltage Temperature I = 250 A, referenced to 25 C 24 Q1 DSS D mV/C T Coefficient I = 10 mA, referenced to 25 C Q2 24 J D V = 20 V, V = 0 V Q1 1 A DS GS I Zero Gate Voltage Drain Current DSS V = 20 V, V = 0 V Q2 500 A DS GS Gate to Source Leakage Current, V = 12 V/-8 V, V = 0 V Q1 100 nA GS DS I GSS Forward V = 12 V/-8 V, V = 0 V Q2 100 nA GS DS On Characteristics V = V , I = 250 A Q1 0.8 1.3 2.5 GS DS D V Gate to Source Threshold Voltage V GS(th) V = V , I = 1 mA Q2 1.1 1.4 2.5 GS DS D V Gate to Source Threshold Voltage I = 250 A, referenced to 25 C Q1 -4 GS(th) D mV/C T Temperature Coefficient I = 10 mA, referenced to 25 C Q2 -3 J D V = 10V, I = 20 A 3.8 2.8 GS D V = 4.5 V, I = 18 A Q1 3.4 4.7 GS D V = 10 V, I = 20 A,T =125 C 3.9 5.3 GS D J r Drain to Source On Resistance m DS(on) V = 10V, I = 41 A 0.9 1.2 GS D V = 4.5 V, I = 37 A 1.4 Q2 1.0 GS D V = 10 V, I = 41 A ,T =125 C 1.1 1.5 GS D J V = 5 V, I = 20 A Q1 182 DS D g Forward Transconductance S FS V = 5 V, I = 41 A Q2 315 DS D Dynamic Characteristics 1695 2375 Q1 C Input Capacitance pF iss Q1: Q2 6580 9870 V = 13 V, V = 0 V, f = 1 MHZ DS GS Q1 495 710 C Output Capacitance pF oss Q2 1720 2580 Q2: Q1 54 100 V = 13 V, V = 0 V, f = 1 MHZ C Reverse Transfer Capacitance DS GS pF rss Q2 204 370 Q1 0.1 0.4 1.2 R Gate Resistance g Q2 0.1 0.4 1.2 Switching Characteristics Q1 8 16 t Turn-On Delay Time ns d(on) Q2 16 28 Q1: Q1 2 10 t Rise Time V = 13 V, I = 20 A, R = 6 ns r DD D GEN Q2 6 11 Q1 24 38 t Turn-Off Delay Time Q2: ns d(off) Q2 47 75 = 13 V, I = 41 A, R = 6 V DD D GEN Q1 2 10 t Fall Time ns f Q2 4 10 Q1 25 35 Q Total Gate Charge V = 0 V to 10 V nC g GS Q2 93 130 Q1 Q1 11 16 V = 13 V, I DD D Q Total Gate Charge V = 0 V to 4.5 V nC g GS Q2 43 60 = 20 A Q2 Q1 3.4 Q Gate to Source Gate Charge nC gs V = 13 V, I Q2 13 DD D = 41 A Q1 2.2 Q Gate to Drain Miller Charge nC gd Q2 8.5 2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDPC8014S Rev.C7