Critical Link, LLC MitySOM-AM57F System on Module www.CriticalLink.com 2-Dec-2021 FEATURES TI AM572x/AM574x Sitara Processor - 1.5 GHz Dual ARM Cortex-A15 ARM Neon and HW floating point 32 KB L1 Program/Data Cache 2 MB L2 cache - Up to 2 C66x floating-point DSPs 750 MHz operation 32 KB L1 Program/Data Cache 288 KB Internal SRAM - Hardware Acceleration Power VR SGX544 3D GPU H.264 Video Encode/Decode Up to 4 Embedded Vision Engines 2x ARM Cortex-M4 co-processors 2x dual-core PRUs APPLICATIONS Crypto Hardware accelerators Embedded Instrumentation Factory Automation On-Board Xilinx Artix-7 FPGA Industrial Communication - Up to XC7A50T Grid Infrastructure Up To 2,700 KBits Block RAM Industrial Drives Up To 52,160 Logic Cells Medical Instrumentation - PCIe Interface to AM57x Embedded Control Processing - 2 Transceivers available for external IO Network Enabled Data Acquisition Test and Measurement Up To 4 GB DDR3 RAM on dual banks Software Defined Radio Up To 32 MB QSPI based NOR FLASH Power Protection Systems Integrated Power Management Embedded Cameras Dual Edge and Board to Board Connectors Smart Vision Systems - 96 FPGA I/O Pins - Up To 199 AM57xx Multiplexed IOs BENEFITS 2x 10/100/1000 EMAC / MDIO Rapid Development / Deployment 2x 10/100 EMAC supporting EtherCAT Multiple Connectivity and Interface Options McASP (audio) interface Rich User Interfaces Camera/Video Input High System Integration 2x MMC/SD Fixed & Floating Point Operations 3x I2C, 3x UART High-Level OS Support - 1x USB 2.0 dual-role - Linux - 1x USB 3.0 dual-role - Android - SATA-2 (6 Gbps) Embedded Digital Signal Processing - HDMI 1.4a Output DESCRIPTION The MitySOM-AM57F is a highly configurable, very small form-factor processor card that features a Texas Instruments AM57xx series 1.5 GHz Sitara Processor tightly integrated with the Xilinx Artix-7 Field Programmable Gate Array (FPGA), NOR FLASH and DDR3 RAM memory subsystems. The design of the MitySOM-AM57F allows end-users the capability to develop programs/logic images for all of the compute elements on the AM57xx as well as for the FGPA. The MitySOM-AM57F provides a complete and flexible digital processing infrastructure necessary for the most demanding embedded applications development. 1 Copyright 2020, Critical Link LLC Specifications Subject to Change 60-000050-1 Rev F Critical Link, LLC MitySOM-AM57F System on Module www.CriticalLink.com 2-Dec-2021 The onboard processor provides a dual CPU core topology. The Sitara AM57xx processor family includes a dual ARM Cortex-A15 microprocessor unit (MPU) subsystem capable of running the rich software applications programmer interfaces (APIs) expected by modern system designers. The ARM architecture supports several operating systems, including Linux and Android. In addition to the MPU, the AM57xx also includes up to two DSP C66x floating-point digital signal processing (DSP) core. The DSP core supports the freely provided TI SYSBIOS real-time kernel. Users can leverage the DSP to execute real- time compute algorithms (codecs, image/data processing, compression techniques, filtering, etc.). For additional acceleration, the AM5xx provides 2 Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS) processing modules, and options are available for up to 4 Embedded Vision Engines (EVE), programmable image and vision processing engines. Hirose DF40 (3mm board to board), 100 pins DDR3 Texas Instruments DDR3 1 G 1 G EMIF1 AM57XX Xilinx 2 x 16 2 x 16 Sitara Processor Artix-7 DDR3 DDR3 1 G 1 G EMIF2 1.5 GHz XC7A15T-1CSG325C 2 x 16 2 x 16 JTAG Connector Arm Dual Cortex-A15 QSPI 750 MHz C66x PCIe Gen 2 x2 Options up to QSPI NOR 2x PRU VIP1 Channel 2x Arm Cortex-M4 XC7A50T-2CSG325C I2C I2C1 EEPROM GPMC (Configuration) Tricolor LED AM57XX 96 FPGA Power FPGA Pins Subsystem Power (Bank 15 and Subsystem Bank 34) TPS6590379 PMIC + 5V supply MXM 3.0 Edge Connector (314 Pins) Mates with JAE MM70 Series or Compatible Figure 1 MitySOM-AM57F Block Diagram Figure 1 provides a top-level block diagram of the MitySOM-AM57F processor card. As shown in the figure, there are two main interfaces to the module: a 314 pin Mobile PCI Express Module (MXM) style card-edge connector (J1), with 310 positions utilized, and a 100 pin Hirose DF40 series board-to-board connector (J3). The MXM card-edge connector interface provides power, 155 function multiplex pins from the Sitara processor (supporting 2x RGMII Ethernet MACs, 2x MII Ethercat master or slave interfaces, multiple I2C, UART, digital audio and SPI peripherals as well as standard GPIO), and up to 96 pins of configurable FPGA I/O for application-defined interfacing. The Hirose connector provides a high-speed interface for the AM57xx HDMI, SATA, and USB 3.0 interfaces as well as 2 spare FPGA transceiver lanes. 2 Copyright 2020, Critical Link LLC Specifications Subject to Change 60-000050-1 Rev F 159 Function-Multiplexed Pins USB 2.0 Dual Role HDMI SATA 2 USB 3.0 Dual Role 40 Function-Multiplexed Pins 2x Spare Transceivers Temperature Diode & ADC Input VCCO Bank 15 VCCO Bank 34