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Critical Link, LLC MitySOM www.CriticalLink.com MitySOM-5CSx System on Module 25 April 2019 FEATURES Intel Cyclone V - U672 SoC - Up To Dual ARM Cortex- A9 MPU - 925MHz Max clock speed - Dual NEON SIMD Coprocessors - 32 KB L1 Program Cache (per core) - 32 KB L1 Data Cache (per core) - 512 KB L2 Cache (shared) - 64 KB on-chip RAM - ECC Support Mechanical - Up To 133 User FPGA I/O Pins - 314-Pin Card Edge Connector - 44 CPU I/O Pins - Small 82mm (3.2) x 39mm (1.5) size - 6 High speed transceivers (SX only) Hard Processor System (HPS) Cyclone V Processor Choices - Selection of boot sources - Cyclone V SX (3.125 Gbps transceivers) - Up to 2 10/100/1000 Mbps Ethernet - Cyclone V SE MACs - Up to 2 USB 2.0 OTG Ports - Up to 2 CAN Interfaces Memory - Up To 2GB DDR3 CPU RAM - Up to 2 UARTs - 1 MMC/SD/SDIO x32 bits + ECC - Up To 512MB DDR3 FPGA RAM - Up to 4 I2C controllers - Up to 2 master/2 slave SPI x8 bits (optional) - Up To 272MB QPSI NOR FLASH - 3 HPS PLLs Integrated Power Management APPLICATIONS JTAG connector on-module Machine Vision Test and Measurement FPGA Fabric Embedded Instrumentation - Up To 110K Logic Elements (LE) Industrial Automation and Control - 460Mhz Global Clock Industrial Instrumentation - Up To 5.1Mb M10K Memory Medical Instrumentation - Up To 621Kb MLAB Memory Closed Loop Motor Control - Up To 112 DSP Blocks - Up To 6 FPGA PLLs BENEFITS - Fractional PLL Outputs on each PLL Rapid Development / Deployment Multiple Connectivity and I/O Options Low Power Serial Transceivers (SX only) Rich User Interfaces - 3.125Gbps Transceivers High System Integration - PCIe Hard IP Block High Level OS Support (Gen1.1 x1 or x4) - Embedded Linux rd - Micrium uC/OS (via 3 Party) Power, Reset and Clock Management rd - Android (via 3 Party) rd - QNX (via 3 Party) DESCRIPTION The MitySOM-5CSx series of highly configurable, small form-factor System-on-Modules (SoM) feature an Intel Cyclone V System-on-Chip (SoC). Additionally, the module includes on-board power supplies, NOR FLASH and DDR3 RAM memory subsystems. A MitySOM-5CSx provides a complete and flexible CPU infrastructure for highly integrated embedded systems. 1 Copyright 2015, Critical Link LLC Specifications Subject to Change 60-000035-1A Critical Link, LLC MitySOM www.CriticalLink.com MitySOM-5CSx System on Module 25 April 2019 The MitySOM-5CSX is available with either a Cyclone V SX or Cyclone V SE which provide up-to Dual-core Cortex-A9 32-bit RISC processors with dual NEON SIMD coprocessors. This MPU is capable of running a rich set of real-time operating systems containing software applications programming interfaces (APIs) expected by modern system designers. The ARM architecture supports several operating systems, including Linux, Micrium uC/OS, Android and QNX. MitySOM 5CSx System On Module Block Diagram Up To Up To Up To Up To Up To 512 MB 512 MB 512 MB 512 MB 512 MB Temperature DDR3 RAM DDR3 RAM DDR3 RAM DDR3 RAM DDR3 RAM (LM73) X8 x8 x8 x8 x8 (ECC) RGB LED (LP5562) 16Kb EEPROM RTC HPS DDR3 Interface (Maximum 32 bits wide + 8 bits ECC) (AB1803) QUAD SPI QUAD SPI Boot FLASH NOR FLASH Intel 16 MB NOR Up-to 256 MB Cyclone V SX w/ 6x 3.125Gbps Xcvrs or Cyclone V SE w/o Xcvrs Power Supply JTAG Connector Generation (HPS & FPGA) Up-to 133 User FPGA I/O or 107 User FPGA I/O with FPGA DDR And 44 User HPS I/O Sequencing Up-to 512 MB DDR3 RAM Up-to DUAL ARM Cortex A9 925 MHz X8 FPGA Fabric + High Speed Interconnect (optional) 26 2 16 12 14 5 3 8 68 32 6 10 1 28 USB OTG PHY 5 314-pin Edge Connector Figure 1 MitySOM-5CSx Block Diagram Figure 1 provides a top-level block diagram of the MitySOM-5CSx processor card. As shown in the figure, the primary interface to the MitySOM-5CSx is through a 314-Pin card edge interface. Details of the edge connector interface are included in the Card Edge Interface Description section. 2 Copyright 2015, Critical Link LLC Specifications Subject to Change 60-000035-1A +5VIN +1.8V +VIO EN 2.5V +3VBAT +V B4A +V B3B +V B8A HPS GPI ID Cyclone V SX only 6 TX, 6 RX, 2 RefClk, 3.125Gbps UART0 TX/RX RGMII1 / NAND / GPIOs SDMMC/USB0 CAN/I2C/SPI MSEL HPS CLK/RESET FPGA CONFIG Bank4A FPGA I/O Bank3B FPGA I/O Bank8A FPGA I/O Bank5A FPGA I/O 2 I C0 USB1 Bank3A/5A FPGA I/O (Expanded IO No FPGA DDR) OTG USB 1
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