74LVC373A OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS Description Pin Assignments The 74LVC373A provides eight transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high- impedance state. The device is designed for operation with a power supply range of 1.65V to 3.6V. The inputs are tolerant to 5.5V allowing this device to be used in a Applications mixed voltage environment. The device is fully specified for partial power down applications using I . The I circuitry disables the General Purpose Logic OFF OFF output preventing damaging current backflow when the device is Bus Driving powered down. Power Down Signal Isolation Wide array of products such as: PCs, Notebooks, Netbooks, Ultrabooks Features Networking Computer Peripherals, Hard Drives, CD/DVD Supply Voltage Range from 1.65V to 3.6V ROM Sinks or Sources 24mA at V = 3V CC TV, DVD, DVR, Set Top Box CMOS Low Power Consumption I Supports Partial Power Down Operation OFF Inputs or Outputs Accept Up to 5.5V Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage Applications Schmitt Trigger Action at All Inputs Typical V (Quiet Output Ground Bounce) Less Than 0.8V with OLP V = 3.3V and T = +25C CC A Typical V (Quiet Output dynamic VOH) Greater than 2.0V with OHV V = 3.3V and T = +25C CC A ESD Protection Tested per JESD 22 Exceeds 200-V Machine Model (A115) Exceeds 2000-V Human Body Model (A114) Exceeds 1000-V Charged Device Model (C101) Latch-Up Exceeds 250mA per JESD 78, Class II All devices are: Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2) Halogen and Antimony Free. Green Device (Note 3) Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See 74LVC373A Ordering Information 74 LVC 373A xxx -13 Logic Device Function Package Packing 74 : Logic Prefix 373 : Octal T20 : TSSOP-20 -13 : 13 Tape & Reel Transparent D- Q20 : QFN-20 Type Latch with 3-State Outputs Package Package 13 Tape and Reel Package Part Number Code (Note 4 & 5) Size Quantity Part Number Suffix 6.4mm X 6.5mm X 1.2mm 74LVC373AT20-13 T20 TSSOP-20 2500/Tape & Reel -13 0.65 mm lead pitch 2.5mm X 4.5mm X 0.95mm 74LVC373AQ20-13 Q20 V-QFN4525-20 2500/Tape & Reel -13 0.50 mm lead pitch Notes: 4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at