74LVC573A OCTAL TRANSPARENT D-TYPE LATCH WITH 3 STATE OUTPUTS A Description Pin Assignments The 74LVC573A provides eight transparent D-type latches. While (Top View ) ( ) the latch-enable (LE) input is high, the Q outputs follow the data (D) Top Transparent View terminal inputs. When LE is taken low, the Q outputs are latched at the logic ind1ex 1 20 Vcc OE area levels set up at the D inputs. A buffered output-enable (OE) input 2 19 D1 Q1 can be used to place the eight outputs in either a normal logic state 19 D1 2 Q1 3 (high or low logic levels) or the high-impedance state. In the high- D2 18 Q2 D2 3 18 Q2 impedance state, the outputs neither load nor drive the bus lines 17 D3 4 Q3 4 17 D3 Q3 significantly. The high-impedance state and increased drive provide 5 16 D4 Q4 D4 5 16 Q4 the capability to drive bus lines without interface or pullup 6 15 6 15 D5 Q5 components. OE does not affect the internal operations of the D5 Q5 D6 7 14 Q6 latches. Old data can be retained or new data can be entered while 7 D6 14 Q6 the outputs are in the high-impedance state. D7 8 13 Q7 D7 8 13 Q7 9 12 D8 Q8 These devices feature inputs and outputs on opposite sides of the D8 9 12 Q8 package that facilitate printed circuit board layout. The device is 10 11 LE GND designed for operation with a power supply range of 1.65V to 3.6V. V-QFN4525-20 TSSOP-20 The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using I . The I circuitry disables the Applications OFF OFF output preventing damaging current backflow when the device is General Purpose Logic powered down. Bus Driving Power Down Signal Isolation Features Wide Array of Products such as: PCs, Notebooks, Netbooks, Ultrabooks Supply Voltage Range from 1.65V to 3.6V Networking Computer Peripherals, Hard Drives, CD/DVD Sinks or Sources 24mA at V = 3V CC ROM CMOS Low Power Consumption TV, DVD, DVR, Set Top Box I Supports Partial-Power Down Operation OFF Inputs or Outputs Accept Up to 5.5V Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage Applications Schmitt Trigger Action at All Inputs Typical V (Quiet Output Ground Bounce) Less than 0.8V OLP with V = 3.3V and T = +25C CC A Typical V (Quiet Output Dynamic VOH) Greater than 2.0V OHV with V = 3.3V and T = +25C CC A ESD Protection Tested per JESD 22 Exceeds 200-V Machine Model (A115) Exceeds 2000-V Human Body Model (A114) Exceeds 1000-V Charged Device Model (C101) Latch-Up Exceeds 250mA per JESD 78, Class I All devices are: Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2) Halogen and Antimony Free. Green Device (Note 3) Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See 74LVC573A A Ordering Information 74 LVC 573A XXX -13 Logic Device Function Package Packing 74 : Logic Prefix 573A : Octal T20 : TSSOP-20 -13 : 13 Tape & Reel Transparent D- LVC : Low Voltage CMOS Q20 : V-QFN4525-20 Type Latch with 3-State Outputs Package 13 Tape and Reel Package Package Part Number Code (Notes 4 & 5) Size Quantity Part Number Suffix 6.4mm X 6.5mm X 1.2mm 74LVC573AT20-13 T20 TSSOP-20 2500/Tape & Reel -13 0.65mm Lead Pitch 2.5mm X 4.5mm X 0.95mm 74LVC573AQ20-13 Q20 V-QFN4525-20 2500/Tape & Reel -13 0.50mm Lead Pitch Notes: 4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at