PI90LV386/PI90LVT386 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 High-Speed Differential Line Receivers Features Description Sixteen line receivers meet or exceed the requirements of the The PI90LVx386 family consists of sixteen differential line receivers ANSI TIA/EIA-644-1995 Standard with 3-state outputs that implement Low-Voltage Differential Designed for signaling rates up to 660 Mbps Signaling (LVDS). Any of the differential receivers will provide a 0V to 3V common-mode input voltage range valid logical output state with a 100mV differential input voltage Operates from a single 3.3V supply within the input common-mode voltage range that allows 0 to 3V of Typical propagation delay time: 2.6ns ground potential difference between two LVDS nodes. The indepen- Output skew 100ps (typical) dent EN pins can be used to place the outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In high- Part-to-part skew is less than 1ns impedance state, outputs neither load nor drive the bus lines. Integrated 110-Ohm termination on PI90LVT386 Low Voltage TTL (LVTTL) levels are 5V tolerant The intended application of these devices, and their signaling Open-circuit fail safe techniques, is for point-to-point baseband data transmission over controlled impedance media of approximately 100-ohms with a Flow-through pin out 100-Ohm termination resistor. The PI90LVT386 integrates the termi- Packaging (Pb-free & Green available): nating resistors while the PI90LV386 requires external resistors. - 64-Pin Thin Shrink Small Output TSSOP (A) The transmission media may be printed circuit board traces, backplanes, or cables. The PI90LV386s 16 receivers integrated into the same substrate allow precise timing alignment. Pin Configuration These parts are characterized for operation from 40C to 85C. 1R 1 64 GND IN1+ 1R 2 63 V CC IN1 1R V 3 62 IN2+ CC Block Diagram 1R 4 61 GND IN2 1R 5 60 EN1 IN3+ 1R 1R 6 59 OUT1 IN3 1R 1R 7 58 IN4+ OUT2 1R 8 57 1R IN4 OUT3 2R 1R 9 56 OUT4 IN1+ 2R 10 55 EN2 IN1 2R 2R 11 54 IN2 OUT1 2R 2R 12 53 OUT2 IN2 2R 2R IN3+ 13 52 OUT3 2R 2R 14 51 IN3 OUT4 64-Pin 2R GND IN4+ 15 50 A 2R V IN4 16 49 CC 3R 17 48 V CC IN1+ 3R GND IN1 18 47 3R 3R 19 46 OUT1 IN2+ 3R 3R 20 45 IN2 OUT2 3R 3R IN3+ 21 44 OUT3 3R 3R 22 43 IN3 OUT4 3R 23 42 EN3 IN4+ 4R 3R 24 41 OUT1 IN4 4R 40 4R 25 IN1+ OUT2 4R 4R 26 39 IN1 OUT3 4R 4R 27 38 IN2+ OUT4 4R 37 IN2 28 EN4 4R 29 36 GND IN3+ 4R 30 35 V IN3 CC 4R 34 V IN4+ 31 CC 4R IN4 32 33 GND 16 Receivers 08-0295 PS8574D 11/11/08 1PI90LV386/PI90LVT386 High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Absolute Maximum Ratings Over Operating Free-Air Temperature (unless otherwise noted) (1) Supply Voltage Range, V 0.5V to 4V ....................................... DD Stresses beyond those listed under Absolute Maximum Ratings may Voltage Range: ............................................... Enables or R cause permanent damage to the device. These are stress ratings only, and OUT functional operation of the device at these or any other conditions beyond 0.5V to V +2V DD those indicated underRecommended Operating Condition is not R or R ........................................................................ 0.5V to 4V IN+ IN implied. Exposure to Absolute-Maximum-Rated conditions for extended (2): periods may affect device reliability. Electrostatic Discharge R , R , and GND ....................... Class 3, A: 10kV, B:700V IN+ IN Notes: All Pins .............................................. Class 3, A: 8kV, B:600V 1. All voltage values, except differential I/O bus voltages, are with respect to ground terminal. Storage Temperature Range ............................. 65C to 150C 2. Tested in accordance with MIL-STD-883C Method 3015.7 Lead Temperature 1, 6mm (1/16 inch) from case for 10 seconds .................................................... 260C Function Table Dsifferential Input Etnable Outpu RNER IN OUT V 1H00mV H ID 100mV < V 1H00mV ID V H100mV L ID XL Z OHpen H XH R OUT 0 Notes: H = high level, L = low level, X = irrelevent Z = high impedance (off), = indeterminate Recommended Operating Conditions M.in. N.om Msax Unit Supply Voltage, V 33.0 36. 3. CC High-Level Input Voltage, V 2.0 IH Low-Level Input Voltage, V 0.8 IL Magnitude of Differential Input Voltage V 06.1 0. V ID V 2.4 V ID ID 2 2 Common-Mode input Voltage, V IC V 0.8 CC OTperating free-air temperature, 540 8C A 08-0295 PS8574D 11/11/08 2