ZXT12P40DXTA Diodes Incorporated

ZXT12P40DX SuperSOT4 DUAL 40V PNP SILICON LOW SATURATION SWITCHING TRANSISTOR SUMMARY V =-40V R = 75m I = -2A CEO SAT C DESCRIPTION This new 4th generation ultra low saturation transistor utilises the Zetex matrix structure combined with advanced assembly techniques to give extremely low on state losses. This makes it ideal for high efficiency, low voltage switching applications. MSOP8 FEATURES Extremely Low Equivalent On Resistance C1 C2 Extremely Low Saturation Voltage h characterised up to 5A FE I =2A Continuous Collector Current C B1 B2 MSOP8 package APPLICATIONS DC - DC Converters E1 E2 Power Management Functions Power switches Motor control E1 C1 ORDERING INFORMATION B1 C1 E2 C2 DEVICE REEL SIZE TAPE WIDTH QUANTITY B2 C2 (inches) (mm) PER REEL 12mm embossed ZXT12P40DXTA 7 1000 units Top View ZXT12P40DXTC 13 12mm embossed 4000 units DEVICE MARKING T12P40DX ISSUE 2 - DECEMBER 2006 1 3 1 4 2 5 6 7 8ZXT12P40DX ABSOLUTE MAXIMUM RATINGS. PARAMETER SYMBOL LIMIT UNIT Collector-Base Voltage V -50 V CBO Collector-Emitter Voltage V -40 V CEO Emitter-Base Voltage V -7.5 V EBO Peak Pulse Current I -5 A CM Continuous Collector Current I -2 A C Base Current I -500 mA B Power Dissipation at TA=25C (a)(d) P 0.87 W D 6.9 mW/C Linear Derating Factor Power Dissipation at TA=25C (a)(e) P 1.04 W D 8.3 mW/C Linear Derating Factor Power Dissipation at TA=25C (b)(d) P 1.25 W D 10 mW/C Linear Derating Factor Operating and Storage Temperature Range T :T -55 to +150 C j stg THERMAL RESISTANCE PARAMETER SYMBOL VALUE UNIT Junction to Ambient (a)(d) R 143 C/W JA Junction to Ambient (b)(d) R 100 C/W JA Junction to Ambient (a)(e) R 120 C/W JA NOTES (a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions (b) For a device surface mounted on FR4 PCB measured at t 5 secs. (c) Repetitive rating - pulse width limited by maximum junction temperature. Refer to Transient Thermal Impedance graph. (d) For device with one active die. (e) For device with two active die running at equal power. ISSUE 2 - DECEMBER 2006 2