EMD4E001G16G2-150CAS2 Everspin

EMD4E001GAS2 FEATURES 1Gb Non-Volatile ST-DDR4 Spin-transfer Torque MRAM 128Mb x8, 64Mb x16 Organization Supports most DDR4 features Page size of 1024 bits for x8, 2048 bits for x16 VDD = VDDQ = 1.2v VPP = 2.5V Operating Temperature of 0C to 85 C 667MHz clock frequency (fCK) On-Device Termination Multipurpose register READ and WRITE capability Per-Device addressability (PDA) Connectivity Test On-Chip DLL aligns DQ, DQS, DQS transition with CK transition Burst lengths of 8 addresses All addresses and control inputs are latched on rising edge of the clock -11 Bit Error Rate (BER) = 1 x 10 Data Retention = 3 months at 70C 10 Cycle Endurance = 1 x 10 Standard FBGA package options (Pb-free): 78-ball (10mm x 13mm) package (x8) 96-ball (10mm x 13mm) package (x16) Timing cycle time: 1.5ns CL = 10 (ST-DDR4 1333) 1.5ns CWL = 9 (ST-DDR4 1333) 2020 Everspin Technologies 1 EMD4E001GAS2 Revision 1.2 08/2020 All Rights Reserved EMD4E001GAS2 TABLE of CONTENTS 1. CONVENTIONS, DEFINITIONS AND COPYRIGHTS .................................................................... 10 1.1 Signal Naming Convention ............................................................................................. 10 1.2 Device Pin Signal Level ................................................................................................... 10 1.3 Bus Signal Level .............................................................................................................. 10 2. FUNCTIONAL DESCRIPTION .................................................................................................... 11 3. ST-DDR4 SPECIFICATION ENHANCEMENTS, DEVIATIONS & UNSUPPORTED OPTIONS ......... 11 4. SIMPLIFIED STATE DIAGRAM .................................................................................................. 17 5. FUNCTIONAL BLOCK DIAGRAM .............................................................................................. 19 5.1 Available Speed Bins ...................................................................................................... 21 5.2 Addressing Scheme ........................................................................................................ 21 6. PACKAGING and SIGNAL DESCRIPTIONS ................................................................................. 22 7. ELECTRICAL SPECIFICATIONS .................................................................................................. 27 7.1 Absolute Maximum Ratings ........................................................................................... 27 7.2 Operating Temperature Range ...................................................................................... 28 7.3 AC/DC OPERATING CONDITIONS ................................................................................... 28 7.4 VREFCA Supply ............................................................................................................... 29 7.5 V Supply and Calibration Ranges ............................................................................ 30 REFDQ 7.6 VREFDQ Ranges .............................................................................................................. 30 7.7 SPEED BIN OPERATING CONDITIONS ............................................................................. 32 8. I , I AND I SPECIFICATION PARAMETERS ....................................................................... 33 DD PP DDQ 8.1 Current Specifications Patterns and Test Conditions .................................................. 33 9. ELECTRICAL CHARACTERISTICS AND AC TIMING PARAMETERS ............................................. 50 10. POWER UP INITIALIZATION SEQUENCE .................................................................................. 59 10.1 Default Values ................................................................................................................ 59 10.2 Power Up Initialization Sequence .................................................................................. 59 10.3 Reset with Stable Power ................................................................................................ 62 10.4 Uncontrolled Power Down Sequence ............................................................................ 63 11. MODE REGISTERS .................................................................................................................... 63 11.1 Programing the Mode Registers .................................................................................... 63 11.2 Mode Register Structure ................................................................................................ 66 11.3 MPR Reads...................................................................................................................... 75 11.4 MPR Readout Format ..................................................................................................... 76 11.5 MPR Readout Serial Format ........................................................................................... 76 2020 Everspin Technologies 2 EMD4E001GAS2 Revision 1.2 08/2020 All Rights Reserved