MR256DL08B Dual Supply 32K x 8 MRAM FEATURES 3.3 Volt V power supply with a range of 2.7V to 3.6V DD I/O Voltage range supports wide +1.65 to +3.6 Volt interfaces Fast 45 ns read/write cycle SRAM compatible timing Unlimited read & write endurance Data always non-volatile for >20-years at temperature All products meet MSL-3 moisture sensitivity level RoHS-compliant small footprint BGA package BENEFITS One memory replaces FLASH, SRAM, EEPROM and BBSRAM in systems RoHS for simpler, more efficient designs Improves reliability by replacing battery-backed SRAM INTRODUCTION The MR256DL08B is a 262,144-bit magnetoresistive random access memory (MRAM) device organized as 32,768 words of 8 bits. It supports I/O voltages from +1.65 to +3.6 volts. The MR256DL08B offers SRAM compatible 45ns read/write timing with unlimited endurance. Data is always non-volatile for greater than 20-years. Data is automatically protected on power loss by low-voltage inhibit circuitry to prevent writes with voltage out of specification. The MR256DL08B is the ideal memory solution for applications that must permanently store and retrieve critical data and programs quickly. The MR256DL08B is available in small footprint 8 mm x 8 mm, 48-pin ball grid array (BGA) package with 0.75 mm ball centers. The MR256DL08B provides highly reliable data storage over a wide range of temperatures. The product is offered with commercial temperature (0 to +70 C). CONTENTS 1. DEVICE PIN ASSIGNMENT......................................................................... 2 2. ELECTRICAL SPECIFICATIONS................................................................. 4 3. TIMING SPECIFICATIONS.......................................................................... 8 4. ORDERING INFORMATION....................................................................... 13 5. MECHANICAL DRAWING.......................................................................... 14 6. REVISION HISTORY...................................................................................... 15 How to Reach Us.......................................................................................... 15 Copyright Everspin Technologies 2018 1 MR256DL08B Rev.2.3 3/2018MR256DL08B 1. DEVICE PIN ASSIGNMENT Figure 1.1 Block Diagram OUTPUT G ENABLE OUTPUT ENABLE BUFFER 7 A 14:0 ADDRESS 8 ROW BUFFER COLUMN 15 DECODER DECODER CHIP E 8 8 8 OUTPUT ENABLE SENSE BUFFER BUFFER AMPS 32K x 8 BIT MEMORY WRITE W ARRAY ENABLE FINAL BUFFER 8 8 WRITE 8 WRITE DQ 7:0 DRIVER DRIVERS WRITE ENABLE Table 1.1 Pin Functions Signal Name Function A Address Input E Chip Enable W Write Enable G Output Enable DQ Data I/O V Power Supply DD V I/O Power Supply DDQ V Ground SS DC Do Not Connect NC No Connection, Ball D3, H1, H6, G2 Reserved for Future Expansion Copyright Everspin Technologies 2018 2 MR256DL08B Rev.2.3 3/2018