MR25H128AMDFR Everspin

MR25H128A 128Kb Serial SPI MRAM FEATURES No write delays Unlimited write endurance Data retention greater than 20 years Automatic data protection on power loss Block write protection Fast, simple SPI interface with up to 40 MHz clock rate 2.7 to 3.6 Volt power supply range Small Flag DFN Low current sleep mode Industrial and Automotive temperatures Available in 8-pin DFN Small Flag RoHS-compliant package. Direct replacement for serial EEPROM, Flash, FeRAM Industrial Grade and AEC-Q100 Grade 1 and Grade 3 options Moisture Sensitivity MSL-3 INTRODUCTION The MR25H128A is a 128Kbit magnetoresistive random access memory (MRAM) device orga- nized as 16,384 words of 8 bits. The MR25H128A offers serial EEPROM and serial Flash compatible read/write timing with no write delays and unlimited read/write endurance. RoHS Unlike other serial memories, both reads and writes can occur randomly in memo- ry with no delay between writes. The MR25H128A is the ideal memory solution for applications that must store and retrieve data and programs quickly using a small number of I/O pins. The MR25H128A is available in a 5 mm x 6 mm 8-pin DFN Small Flag package compatible with serial EE- PROM, Flash, and FeRAM products. The MR25H128A provides highly reliable data storage over a wide range of temperatures. The product is offered with industrial (-40 to +85 C) and AEC-Q100 Grade 1 (-40C to +125 C) and AEC-Q100 Grade 3 (-40 to +85 C) operating temperature range options. CONTENTS 1. DEVICE PIN ASSIGNMENT......................................................................... 3 2. SPI COMMUNICATIONS PROTOCOL...................................................... 4 3. ELECTRICAL SPECIFICATIONS................................................................. 10 4. TIMING SPECIFICATIONS.......................................................................... 14 5. ORDERING INFORMATION....................................................................... 17 6. MECHANICAL DRAWING.......................................................................... 18 7. REVISION HISTORY...................................................................................... 19 How to Reach Us.......................................................................................... 20 MR25H128A Rev. 1.2 3/2018 Copyright 2018 Everspin Technologies, Inc. 1MR25H128A 1. DEVICE PIN ASSIGNMENT Overview The MR25H128A is a serial MRAM with memory array logically organized as 16Kx8 using the four pin inter- face of chip select (CS), serial input (SI), serial output (SO) and serial clock (SCK) of the serial peripheral inter- face (SPI) bus. Serial MRAM implements a subset of commands common to todays SPI EEPROM and Flash components allowing MRAM to replace these components in the same socket and interoperate on a shared SPI bus. Serial MRAM offers superior write speed, unlimited endurance, low standby & operating power, and more reliable data retention compared to available serial memory alternatives. Figure 1.1 Block Diagram WP Instruction Decode Clock Generator CS Control Logic HOLD Write Protect SCK 16KB MRAM ARRAY Instruction Register 14 8 Address Register Counter SO Data I/O Register SI 4 Nonvolatile Status Register System Configuration Single or multiple devices can be connected to the bus as shown in Figure 1.2. Pins SCK, SO and SI are com- mon among devices. Each device requires CS and HOLD pins to be driven separately. Figure 1.2 System Configuration SCK MOSI MISO SO SI SCK SO SI SCK SPI EVERSPIN SPI MRAM 1 EVERSPIN SPI MRAM 2 Micro Controller CS HOLD CS HOLD CS 1 HOLD 1 CS 2 HOLD 2 MOSI = Master Out Slave In MISO = Master In Slave Out MR25H128A Rev. 1.2 3/2018 Copyright 2018 Everspin Technologies, Inc. 2