MR4A08BCYS35 Everspin

MR4A08B 2M x 8 MRAM Memory FEATURES +3.3 Volt power supply Fast 35 ns read/write cycle SRAM compatible timing Unlimited read & write endurance Data always non-volatile for >20-years at temperature RoHS-compliant small footprint BGA and TSOP2 packages All products meet MSL-3 moisture sensitivity level BENEFITS One memory replaces FLASH, SRAM, EEPROM and BBSRAM in systems for simpler, more efficient designs Improves reliability by replacing battery-backed SRAM INTRODUCTION The MR4A08B is a 16,777,216-bit magnetoresistive random access RoHS memory (MRAM) device organized as 2,097,152 words of 8 bits. The MR4A08B offers SRAM compatible 35ns read/write timing with unlimited endurance. Data is always non-volatile for greater than 20-years. Data is automatically protected on power loss by low- voltage inhibit circuitry to prevent writes with voltage out of specification. The MR4A08B is the ideal memory solution for applications that must permanently store and retrieve critical data and programs quickly. The MR4A08B is available in small footprint 400-mil, 44-lead plastic small-outline TSOP type-II package or 10 mm x 10 mm, 48-pin ball grid array (BGA) package with 0.75 mm ball centers. These packages are com- patible with similar low-power SRAM products and other non-volatile RAM products. The MR4A08B provides highly reliable data storage over a wide range of temperatures. The product is of- fered with commercial (0 to +70 C) and industrial (-40 to +85 C) operating temperature range options. CONTENTS 1. DEVICE PIN ASSIGNMENT......................................................................... 2 2. ELECTRICAL SPECIFICATIONS................................................................. 4 3. TIMING SPECIFICATIONS.......................................................................... 7 4. ORDERING INFORMATION....................................................................... 11 5. MECHANICAL DRAWING.......................................................................... 12 6. REVISION HISTORY...................................................................................... 14 How to Reach Us.......................................................................................... 15 Copyright 2018 Everspin Technologies 1 MR4A08B Rev. 8.7 3/2018MR4A08B 1. DEVICE PIN ASSIGNMENT Figure 1.1 Block Diagram OUTPUT G ENABLE OUTPUT ENABLE BUFFER 10 A 20:0 ADDRESS ROW BUFFER 11 COLUMN 21 DECODER DECODER CHIP E 8 OUTPUT 8 8 ENABLE SENSE BUFFER BUFFER AMPS 2M x 8 BIT MEMORY WRITE W ARRAY ENABLE FINAL BUFFER 8 8 WRITE 8 WRITE DQ 7:0 DRIVER DRIVERS WRITE ENABLE Table 1.1 Pin Functions Signal Name Function A Address Input E Chip Enable W Write Enable G Output Enable DQ Data I/O V Power Supply DD V Ground SS DC Do Not Connect NC No Connection Copyright 2018 Everspin Technologies 2 MR4A08B Rev. 8 .7 3/2018