GLS85LP0512P / 1002P / 1004P / 1008P Industrial Grade PATA NANDrive Factsheet 03.100 June 2019 Features Industry Standard ATA / IDE Bus Interface Expanded Data Protection Host Interface: 16-bit access WP /PD pin configurable by firmware for Supports 48-bit address feature set prevention of data overwrites 1) Data security through user-selectable Supports up to PIO Mode-6 2) protection zones Supports up to Multi-Word DMA Mode-4 Security Erase feature Supports up to Ultra DMA Mode-6 20-Byte Unique ID for Enhanced Security Performance Factory pre-programmed 10-Byte unique ID Sequential data read: Up to 50 MByte/sec* User-programmable 10-Byte ID Sequential data write: Up to 35 MByte/sec* * measured using 128 Kbyte transfer size Integrated Voltage Detector Power Management Prevents inadvertent Write operations due to 3.3V power supply unexpected power-down or brownout Immediate disabling of unused circuitry NAND Configuration without host intervention 1 bit per cell (SLC) Zero wake-up latency Excellent endurance and data retention Power Specification Operating Temperature Range Active mode Industrial: -40C to 85C 8GB: 100mA (typical) 91-ball BGA and LBGA Packages 4GB: 80mA (typical) 2GB, 4GB, 8GB:14.0mm x 24.0mm x 1.90mm, 512MB/2GB: 60mA (typical) 1.0mm ball pitch, FTE Sleep mode: 500A (typical) 512MB: 12.0mm x 24.0mm x 1.40mm, Supports SMART Commands 1.0mm ball pitch, LBTE Robust Built-in ECC All Devices are RoHS Compliant Product Description The GLS85LP0512P / 1002P / 1004P / 1008P The integrated NAND flash controller with built-in Industrial Grade PATA NANDrive devices (referred advanced NAND management firmware to as PATA NANDrive in this factsheet) are fully communicates with the host through the standard ATA integrated, embedded solid state drives. They protocol. It does not require any additional or combine an integrated ATA controller and 512 MBytes, proprietary software such as the Flash File System 2 GBytes, 4 GBytes or 8 GBytes of NAND flash (FFS) and Memory Technology Driver (MTD). memory in a multi-chip package. These products are PATA NANDrive provides a WP /PD pin to protect ideal for embedded and portable applications that critical information stored in the flash media from require smaller form factor and more reliable data unauthorized overwrites. PATA NANDrive is pre- storage. programmed with a 10-Byte unique serial ID and has the option of programming an additional 10-Byte serial ATA-based solid state mass storage technology is ID for even greater system security. widely used in GPS and telematics, in-vehicle infotainment, portable and industrial computers, PATA NANDrives advanced NAND management handheld data collection scanners, point-of-sale technology enhances data security, improves terminals, networking and telecommunications endurance and accurately predicts the remaining equipment, robotics, audio and video recorders, lifespan of the NAND flash devices. This innovative monitoring devices and set-top boxes. technology combines robust error correction capabilities with advanced wear-leveling algorithms PATA NANDrive supports standard ATA/IDE protocol 1) 2) and bad block management to significantly extend the , Multi-Word DMA Mode-4 with up to PIO Mode-6 life of the product. and Ultra DMA Mode-6 interface. The PATA 1) PATA NANDrive is capable of supporting PIO Mode-6, NANDrive device provides complete IDE hard disk but Identify-Drive information report will show PIO Mode-4 drive functionality and compatibility in a 14mm x 2) PATA NANDrive is capable of supporting Multi-Word 24mm BGA package or a 12mm x 24mm LBGA DMA Mode-4, but Identify-Drive information report will show MWDMA Mode-2 package for easy, space saving mounting to a system motherboard. These products surpass traditional storage in their small size, security, reliability, ruggedness and low power consumption. These specifications are subject to change without notice. 06/28/2019 2019 Greenliant 1 S71431-F GLS85LP0512P / 1002P / 1004P / 1008P Industrial Grade PATA NANDrive Factsheet 03.100 June 2019 1.0 GENERAL DESCRIPTION Each PATA NANDrive contains an integrated PATA NAND flash memory controller and NAND flash die in a BGA or LBGA package. Refer to Figure 2-1 for the PATA NANDrive block diagram. 1.1 Optimized PATA NANDrive 1.1.5 Error Correction Code (ECC) The heart of PATA NANDrive is the PATA NAND flash High performance is achieved through optimized memory controller, which translates standard PATA hardware error detection and correction. signals into flash media data and control signals. The following components contribute to PATA NANDrives 1.1.6 Serial Communication Interface (SCI) operation. The Serial Communication Interface (SCI) is designed 1.1.1 Microcontroller Unit (MCU) for error reporting. During the product development stage, it is recommended to provide the SCI port on The MCU transfers the ATA/IDE commands into data the PCB to aid in design validation. and control signals required for flash media operation. 1.1.2 Internal Direct Memory Access (DMA) 1.1.7 Multi-tasking Interface PATA NANDrive uses internal DMA allowing instant The multi-tasking interface enables fast, sustained data transfer from/to buffer to/from flash media. This write performance by allowing concurrent Read, implementation eliminates microcontroller overhead Program and Erase operations to multiple flash media. associated with the traditional, firmware-based 1.2 SMT Reflow Consideration approach, thereby increasing the data transfer rate. The PATA NANDrive family utilizes standard NAND 1.1.3 Power Management Unit (PMU) flash for data storage. Because the high temperature The PMU controls the power consumption of PATA in a surface-mount soldering reflow process can alter NANDrive. The PMU dramatically reduces the power the content on NAND flash, do not program PATA consumption of PATA NANDrive by putting the part of NANDrive before the reflow process. the circuitry that is not in operation into sleep mode. 1.3 Advanced NAND Management The Flash File System handles inadvertent power interrupts and has auto-recovery capability to ensure PATA NANDrives integrated controller uses PATA NANDrives data integrity. For regular power advanced wear-leveling algorithms to substantially management, the host must send an increase the longevity of NAND flash media. Wear IDLE IMMEDIATE command and wait for command caused by data writes is evenly distributed in all or ready before powering down PATA NANDrive. select blocks in the device that prevents hot spots in locations that are programmed and erased extensively. 1.1.4 Embedded Flash File System This effective wear-leveling technique results in The embedded flash file system is an integral part of optimized device endurance, enhanced data retention PATA NANDrive. It contains MCU firmware that and higher reliability required by long-life applications. performs the following tasks: 1. Translates host side signals into flash media writes and reads 2. Provides flash media wear leveling to spread the flash writes across all memory address space to increase the longevity of flash media 3. Keeps track of data file structures 4. Manages system security for the selected protection zones 5. Stores the data in flash media upon completion of a Write command (PATA NANDrive does not perform Post-Write operations, except for when the write cache is enabled) These specifications are subject to change without notice. 06/28/2019 2019 Greenliant 2 S71431-F