GS78116AB BGA 512K x 16 8, 10, 12 ns Commercial Temp 3.3 V V DD 8Mb Asynchronous SRAM Industrial Temp Features Pin Descriptions Fast access time: 8, 10, 12 ns CMOS low power operation: 240/190/170 mA at minimum Symbol Description cycle time A0 to A18 Address input Single 3.3 V 0.3 V power supply DQ1 to DQ16 Data input/output All inputs and outputs are TTL-compatible Fully static operation CE Chip enable input Industrial Temperature Option: 40 to 85C WE Write enable input 14 mm x 22 mm, 119-bump, 1.27 mm Pitch Ball Grid Array OE Output enable input package RoHS-compliant package available V +3.3 V power supply DD V Ground SS Description NC No connect The GS78116A is a high speed CMOS Static RAM organized as 524,288-words by 16-bits. Static design eliminates the need for external clocks or timing strobes. The GS78116A operates on a single 3.3 V power supply, and all inputs and outputs are TTL-compatible. The GS78116 is available in a 14 mm x 22 mm BGA package. Block Diagram A0 Row Memory Array Decoder Address Input Buffer Column Decoder A18 CE WE I/O Buffer Control OE DQ1 DQ16 Rev: 1.04a 2/2007 1/12 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see GS78116AB 512K x 16 Async SRAM in 119-bump, 14 mm x 22 mmTop View (Package B) 1 2 3 4 5 6 7 A NC A15 A14 A16 A13 A12 NC NC, B A11 A10 CE A9 A8 NC V SS V , V , DD SS C NC NC A17 NC NC NC NC V V V V V D NC NC DD SS SS SS DD V V V E DQ1 NC NC DQ16 DD SS DD F DQ2 V V V V V DQ15 DD SS SS SS DD V V V G DQ3 NC NC DQ14 DD SS DD V V V V V H DQ4 DQ13 DD SS SS SS DD V V V V V V V J DD SS DD SS DD SS DD V V V V V K DQ5 DQ12 DD SS SS SS DD L DQ6 NC V V V NC DQ11 DD SS DD V V V V V M DQ7 DQ10 DD SS SS SS DD V V V N DQ8 NC NC DQ9 DD SS DD V V V V V P NC NC DD SS SS SS DD R NC NC NC A18 NC NC NC NC, T NC A7 A6 WE A5 A4 V SS U NC A3 A2 OE A1 A0 NC Note: Bumps 1B, 7T, 3C, and 5C are actually NCs but should be wired 3C = VDD and 1B, 7T and 5C = VSS to assure compatibility with future versions. Rev: 1.04a 2/2007 2/12 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see