GS8322Z18/36(B/E)-225M GS8322Z72C-225M 225 MHz 36Mb Pipelined and Flow Through 119, 165 & 209 BGA 2.5 V or 3.3 V V DD Military Temp Synchronous NBT SRAM 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and Features read/write control inputs are captured on the rising edge of the NBT (No Bus Turn Around) functionality allows zero wait input clock. Burst order control (LBO) must be tied to a power Read-Write-Read bus utilization fully pin-compatible with rail for proper operation. Asynchronous inputs include the both pipelined and flow through NtRAM, NoBL and Sleep mode enable (ZZ) and Output Enable. Output Enable can ZBT SRAMs be used to override the synchronous control of the output 2.5 V or 3.3 V +10%/10% core power supply drivers and turn the RAM s output drivers off at any time. 2.5 V or 3.3 V I/O supply Write cycles are internally self-timed and initiated by the rising User-configurable Pipeline and Flow Through mode edge of the clock input. This feature eliminates complex off- ZQ mode pin for user-selectable high/low output drive chip write pulse generation required by asynchronous SRAMs IEEE 1149.1 JTAG-compatible Boundary Scan and simplifies input signal timing. LBO pin for Linear or Interleave Burst mode Pin-compatible with 2Mb, 4Mb, 9Mb, and 18Mb devices The GS8322Z18/36/72 may be configured by the user to Byte write operation (9-bit Bytes) operate in Pipeline or Flow Through mode. Operating as a 3 chip enable signals for easy depth expansion pipelined synchronous device, in addition to the rising-edge- ZZ Pin for automatic power-down triggered registers that capture input signals, the device JEDEC-standard 119-, 165- or 209-Bump BGA package incorporates a rising edge triggered output register. For read cycles, pipelined SRAM output data is temporarily stored by Functional Description the edge-triggered output register during the access cycle and The GS8322Z18/36/72 is a 36Mbit Synchronous Static then released to the output drivers at the next rising edge of SRAM. GSI s NBT SRAMs, like ZBT, NtRAM, NoBL or clock. other pipelined read/double late write or flow through read/ single late write SRAMs, allow utilization of all available bus The GS8322Z18/36/72 is implemented with GSI s high bandwidth by eliminating the need to insert deselect cycles performance CMOS technology and is available in a JEDEC- when the device is switched from read to write cycles. standard 119-bump, 165-bump or 209-bump BGA package. Parameter Synopsis -225M Unit t (x18/x36) 2.7 ns KQ 3.0 ns t (x72) KQ 4.4 ns Pipeline tCycle 3-1-1-1 Curr (x18) 315 mA Curr (x36) 415 mA Curr (x72) 460 mA t 7.0 ns KQ 7.0 ns tCycle Flow Through Curr (x18) 230 mA 2-1-1-1 Curr (x36) 325 mA Curr (x72) 360 mA Rev: 1.00 1/2011 1/37 2011, GSI Technology Specifications cited are subject to change without notice. For latest documentation see GS8322Z18/36(B/E)-225M GS8322Z72C-225M GS8322Z72C Pad Out209-Bump BGATop View (Package C) 1 2 3 4 5 6 7 8 9 10 11 A DQG DQG A E2 A ADV A E3 A DQB DQB A B DQG DQG BC BG NC W A BB BF DQB DQB B C DQG DQG BH BD NC E1 NC BE BA DQB DQB C V V D DQG DQG NC NC G NC NC DQB DQB D SS SS V V V V V V V E DQPG DQPC DQPF DQPB E DDQ DDQ DD DD DD DDQ DDQ V V V V V V F DQC DQC ZQ DQF DQF F SS SS SS SS SS SS V V V V V V G DQC DQC MCH DQF DQF G DDQ DDQ DD DD DDQ DDQ V V V V V H DQC DQC MCL V DQF DQF H SS SS SS SS SS SS V V V V V V J DQC DQC MCH DQF DQF J DDQ DDQ DD DD DDQ DDQ V V K NC NC CK NC CKE NC NC NC NC K SS SS V V V V V V L DQH DQH FT DQA DQA L DDQ DDQ DD DD DDQ DDQ V V V V V V M DQH DQH MCL DQA DQA M SS SS SS SS SS SS V V V V V V N DQH DQH MCH DQA DQA N DDQ DDQ DD DD DDQ DDQ V V V V V V P DQH DQH ZZ DQA DQA P SS SS SS SS SS SS V V V V V V V R DQPD DQPH DQPA DQPE R DDQ DDQ DD DD DD DDQ DDQ V V T DQD DQD NC NC LBO NC NC DQE DQE T SS SS U DQD DQD NC A NC A A A NC DQE DQE U V DQD DQD A A A A1 A A A DQE DQE V W DQD DQD TMS TDI A A0 A TDO TCK DQE DQE W 2 11 x 19 Bump BGA14 x 22 mm Body1 mm Bump Pitch Rev: 1.00 1/2011 2/37 2011, GSI Technology Specifications cited are subject to change without notice. For latest documentation see