EiceDRIVER 2EDN752x / 2EDN852x Features Fast, precise, strong and compatible Highly efficient SMPS enabled by 5 ns fast slew rates and 17 ns propagation delay precision for fast MOSFET and GaN switching 1 ns channel-to-channel propagation delay accuracy enables safe use of two channels in parallel Two independent 5 A channels enable numerous deployment options Industry standard packages and pinout ease system-design upgrades The new Reference in Ruggedness 4.2 V and 8 V UVLO (Under Voltage Lock Out) options ensure instant MOSFET protection under abnormal conditions -10 V control and enable input robustness delivers crucial safety margin when driving pulse-transformers or driving MOSFETs in through hole packaging 5 A reverse current robustness eliminates the need for output protection circuitry. Typical Applications Server SMPS TeleCom SMPS DC-to-DC Converter Bricks Power Tools Industrial SMPS Motor Control Solar SMPS Example Topologies Single and interleaved PFC LLC, ZVS with pulse transformer Synchronous Rectification Description The 2EDN752x/2EDN852x is an advanced dual-channel driver. It is suited to drive logic and normal level MOSFETs TM TM and supports OptiMOS , CoolMOS , Standard Level MOSFETs, Superjunction MOSFETs, as well as IGBTs and GaN Power devices. Data Sheet Please read the Important Notice and Warnings at the end of this document Rev. 2.5 www.infineon.com 2018-04-20 EiceDRIVER 2EDN752x / 2EDN852x Features The control and enable inputs are LV-TTL compatible (CMOS 3.3 V) with an input voltage range from -5 V to +20 V. -10 V input pin robustness protects the driver against latch-up or electrical overstress which can be induced by parasitic ground inductances. This greatly enhances system stability. 4.2 V and 8 V UVLO (Under Voltage Lock Out) options ensure instant MOSFET and GaN protection under abnormal conditions. Under such circumstances, this UVLO mechanism provides crucial independence from whether and when other supervisors circuitries detect abnormal conditions. Each of the two outputs is able to sink and source 5 A currents utilizing a true rail-to-rail stage. This ensures very low on resistance of 0.7 up to the positive and 0.55 down to the negative rail respectively. Very tight channel to channel delay matching, typ. 1 ns, permits parallel use of two channels, leading to a source and sink capability of 10 A. Industry leading reverse current robustness eliminates the need for Schottky diodes at the outputs and reduces the bill-of-material. The pinout of the 2EDN family is compatible with the industry standard. Two different control input options, direct and inverted, offer high flexibility. Three package variants, DSO 8-pin, TSSOP 8-pin, WSON 8-pin, allow optimization of PCB board space usage and thermal characteristics. VDD Load1 Load2 2EDN752x / 2EDN852x M 1 8 1 ENA ENB 8 R g1 2 2 INA OUTA 77 33 6 GND VDD 6 M 2 R g2 5 4 INB OUTB 5 4 C VDD Data Sheet 2 Rev. 2.5 2018-04-20 From Controller