CY7C65113C USB Hub with Microcontroller Features Full Speed USB hub with an integrated microcontroller Internal Power-on Reset (POR) 8-bit USB optimized microcontroller USB Specification compliance Harvard architecture Conforms to USB Specification, Version 1.1 6-MHz external clock source Conforms to USB HID Specification, Version 1.1 12-MHz internal CPU clock Supports one or two device addresses with up to 5 user-configured endpoints 48-MHz internal hub clock Up to two 8-byte control endpoints Internal memory Up to four 8-byte data endpoints 256 bytes of RAM Up to two 32-byte data endpoints 8 KB of PROM Integrated USB transceivers 2 Integrated Master/Slave I C-compatible Controller (100 kHz) Supports four downstream USB ports enabled through General-purpose I/O (GPIO) pins GPIO pins can provide individual power control outputs for each downstream USB port I/O ports GPIO pins can provide individual port over current inputs Two GPIO ports (Port 0 to 2) capable of sinking 7 mA per for each downstream USB port pin (typical) Higher current drive achievable by connecting multiple Improved output drivers to reduce electromagnetic GPIO pins together to drive a common output interference (EMI) Each GPIO port can be configured as inputs with internal Operating voltage from 4.0V to 5.5V DC pull-ups or open drain outputs or traditional CMOS outputs Maskable interrupts on all I/O pins Operating temperature from 0 to 70 C 12-bit free-running timer with one microsecond clock ticks Available in 28-pin SOIC (-SXC) package Watchdog timer (WDT) Industry-standard programmer support Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-08002 Rev. *H Revised June 29, 2017 CY7C65113C Functional Overview The CY7C65113C device is a one-time programmable 8-bit Timer microcontroller with a built-in 12-Mbps USB hub that supports up The free-running 12-bit timer clocked at 1 MHz provides two to four downstream ports. The microcontroller instruction set has interrupt sources, 128-s and 1.024-ms. The timer can be used been optimized specifically for USB operations, although the to measure the duration of an event under firmware control by microcontrollers can be used for a variety of non-USB embedded reading the timer at the start of the event and after the event is applications. complete. The difference between the two readings indicates the GPIO duration of the event in microseconds. The upper four bits of the timer are latched into an internal register when the firmware The CY7C65113C has 11 GPIO pins (P0 7:0 , P1 2:0 ), both reads the lower eight bits. A read from the upper four bits actually rated at 7 mA per pin (typical) sink current. Multiple GPIO pins reads data from the internal register, instead of the timer. This can be connected together to drive a single output for more drive feature eliminates the need for firmware to try to compensate if current capacity. the upper four bits increment immediately after the lower eight Clock bits are read. The microcontroller uses an external 6-MHz crystal and an Interrupts internal oscillator to provide a reference to an internal The microcontroller supports ten maskable interrupts in the phase-locked loop (PLL)-based clock generator. This technology vectored interrupt controller. Interrupt sources include the USB allows the customer application to use an inexpensive 6-MHz Bus Reset interrupt, the 128-s (bit 6) and 1.024-ms (bit 9) fundamental crystal that reduces the clock-related noise outputs from the free-running timer, five USB endpoints, the USB emissions (EMI). A PLL clock generator provides the 6-, 12-, and 2 hub, the GPIO ports, and the I C-compatible master mode 48-MHz clock signals for distribution within the microcontroller. interface. The timer bits cause an interrupt (if enabled) when the Memory bit toggles from LOW 0 to HIGH 1. The USB endpoints interrupt after the USB host has written data to the endpoint FIFO or after The CY7C65113C is offered with 8 KB of PROM. the USB controller sends a packet to the USB host. The GPIO Power-on Reset, Watchdog, and Free-running Timer ports also have a level of masking to select which GPIO inputs These parts include power-on reset logic, a Watchdog timer, and can cause a GPIO interrupt. Input transition polarity can be a 12-bit free-running timer. The POR logic detects when power programmed for each GPIO port as part of the port configuration. is applied to the device, resets the logic to a known state, and The interrupt polarity can be rising edge (0 to 1) or falling edge begins executing instructions at PROM address 0x0000. The (1 to 0). Watchdog timer is used to ensure the microcontroller recovers USB after a period of inactivity. The firmware may become inactive for The CY7C65113C includes an integrated USB Serial Interface a variety of reasons, including errors in the code or a hardware Engine (SIE) that supports the integrated peripherals and the failure such as waiting for an interrupt that never occurs. hub controller function. The hardware supports up to two USB 2 I C device addresses with one device address for the hub (two The microcontroller can communicate with external electronics endpoints) and a device address for a compound device (three 2 through the GPIO pins. An I C-compatible interface accommo- endpoints). The SIE allows the USB host to communicate with dates a 100-kHz serial link with an external device. the hub and functions integrated into the microcontroller. The CY7C65113C part includes a 1:4 hub repeater with one upstream port and four downstream ports. The USB Hub allows power management control of the downstream ports by using GPIO pins assigned by the user firmware. The user has the option of ganging the downstream ports together with a single pair of power management pins, or providing power management for each port with four pairs of power management pins. Document Number: 38-08002 Rev. *H Page 2 of 50