Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comCY8C23433, CY8C23533 PSoC Programmable System-on-Chip Additional system resources Features 2 I C slave, master, and multi-master to 400 kHz Powerful Harvard-architecture processor Watchdog and sleep timers M8C processor speeds to 24 MHz User-configurable low voltage detection 8x8 multiply, 32-bit accumulate Integrated supervisory circuit Low power at high speed On-chip precision voltage reference 3.0 V to 5.25 V operating voltage Complete development tools Industrial temperature range: 40 C to +85 C Free development software (PSoC Designer) Advanced peripherals (PSoC blocks) Full-featured in-circuit emulator and programmer Four Rail-to-Rail analog PSoC blocks provide: Full speed emulation Up to 14-bit ADCs Complex breakpoint structure Up to 8-bit DACs 128-KB trace memory Programmable gain amplifiers Programmable filters and comparators Logic Block Diagram Four digital PSoC blocks provide: Analog 8- to 32-bit timers and counters, 8- and 16-bit pulse-width Port 3 Port 2 Port 1 Port 0 Drivers modulators (PWMs) PSoC CORE CRC and PRS modules Full-duplex UART System Bus Multiple SPI masters or slaves Connectable to all GPIO pins Global Digital Interconnect Complex peripherals by combining blocks Global Analog Interconnect High-Speed 8-bit SAR ADC optimized for motor control SRAM SROM Flash 8K 256 Bytes Precision, programmable clocking 1 CPU Core (M8C) Sleep and Internal 5% 24-/48-MHz oscillator Interrupt Watchdog Controller High-accuracy 24 MHz with optional 32-KHz crystal and PLL Optional external oscillator, up to 24 MHz Multiple Clock Sources Internal oscillator for watchdog and sleep (Includes IMO, ILO, PLL, and ECO) Flexible on-chip memory 8 KB flash program storage 50,000 erase/write cycles DIGITAL SYSTEM ANALOG SYSTEM 256 bytes SRAM data storage Analog Digital Analog Ref In-system serial programming (ISSP) Block Block Array Partial flash updates Array 2 Columns Flexible protection modes 4 Blocks 1 Row Analog 4 Blocks EEPROM emulation in flash Input SAR8 ADC Muxing Programmable pin configurations 25-mA Sink, 10-mA source on all GPIO Pull-up, pull-down, high Z, strong, or open drain drive modes on all GPIO Internal Up to eight analog inputs on GPIO plus two additional analog Digital Multiply POR and LVD 2 Decimator Voltage I C inputs with restricted routing Clocks Accum. System Resets Ref. Two 30-mA analog outputs on GPIO SYSTEM RESOURCES Configurable interrupt on all GPIOs Note 1. Errata: When the device is operated within 0 C to 70 C, the frequency tolerance is reduced to 2.5%, but if operated at extreme temperature (below 0 C or above 70 C), frequency tolerance deviates from 2.5% to 5%. For more information, see Errata on page 50. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-44369 Rev. *I Revised January 29, 2015