CY8C24094/CY8C24794 CY8C24894/CY8C24994 PSoC Programmable System-on-Chip PSoC Programmable System-on-Chip Up to 48 analog inputs on GPIOs Features Two 33 mA analog outputs on GPIOs XRES pin to support in-system serial programming (ISSP) and Configurable interrupt on all GPIOs external reset control in CY8C24894 Precision, programmable clocking Powerful Harvard-architecture processor Internal 4% 24- / 48-MHz main oscillator M8C processor speeds up to 24 MHz Internal oscillator for watchdog and sleep Two 8 8 multiply, 32-bit accumulate 0.25% accuracy for USB with no external components Low power at high speed Additional system resources Operating voltage: 3 V to 5.25 V 2 I C slave, master, and multi-master to 400 kHz Industrial temperature range: 40 C to +85 C Watchdog and sleep timers USB temperature range: 10 C to +85 C User-configurable low-voltage detection (LVD) Advanced peripherals (PSoC Blocks) Six rail-to-rail analog PSoC blocks provide: Logic Block Diagram Up to 14-bit analog-to-digital converters (ADCs) Up to 9-bit digital-to-analog converters (DACs) Analog Programmable gain amplifiers (PGAs) Port 5 Port 4 Port 3 Port 2 Port 1 Port 0 Port 7 Drivers Programmable filters and comparators Four digital PSoC blocks provide: 8- to 32-bit timers, counters, and pulse width modulators (PWMs) Cyclical redundancy check (CRC) and pseudo random Global Digital Interconnect sequence (PRS) modules Global Analog Interconnect Full-duplex universal asynchronous receiver transmitter PSoC CORE (UART) SRAM SROM Flash 16 KB Multiple serial peripheral interface (SPI) masters or slaves 1K Sleep and CPU Core (M8C) Watchdog Connectable to all general-purpose I/O (GPIO) pins Interrupt Controller Complex peripherals by combining blocks Clock Sources Capacitive sensing application (CSA) capability (Includes IMO and ILO) Full speed USB (12 Mbps) Four unidirectional endpoints DIGITAL SYSTEM ANALOG SYSTEM One bidirectional control endpoint Analog USB 2.0 compliant Ref. Dedicated 256 byte buffer Digital Analog Block Block No external crystal required Array Array Flexible on-chip memory 16 KB flash program storage 50,000 erase and write cycles 1 KB static random access memory (SRAM) data storage ISSP Partial flash updates Flexible protection modes Analog Internal Digital 2 Decimator 2 POR and LVD I C Voltage USB Input Electrically erasable programmable read-only memory Clocks MACs Type 2 System Resets Ref. Muxing (EEPROM) emulation in flash SYSTEM RESOURCES Programmable pin configurations 25-mA sink, 10-mA source on all GPIOs Pull-up, pull-down, high Z, strong, or open-drain drive modes on all GPIOs Errata: For information on silicon errata, see Errata on page 64. Details include trigger conditions, devices affected, and proposed workaround. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-12018 Rev. AM Revised July 4, 2017 s System BuCY8C24094/CY8C24794 CY8C24894/CY8C24994 More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article KBA92181, Resources Available for CapSense Controllers. Following is an abbreviated list for CapSense devices: Overview: CapSense Portfolio, CapSense Roadmap Development Kits: CY3280-24x94 Universal CapSense Controller Board Product Selectors: CapSense, CapSense Plus, CapSense features a predefined control circuitry and plug-in hardware Express, PSoC3 with CapSense, PSoC5 with CapSense, to make prototyping and debugging easy. Programming and PSoC4. In addition, PSoC Designer offers a device selection I2C-to-USB Bridge hardware are included for tuning and data tool at the time of creating a new project. acquisition. Application notes: Cypress offers CapSense application notes CY3280-BMM Matrix Button Module Kit consists of eight covering a broad range of topics, from basic to advanced level. CapSense sensors organized in a 4x4 matrix format to form Recommended application notes for getting started with 16 physical buttons and eight LEDs. This module connects CapSense are: to any CY3280 Universal CapSense Controller Board, including CY3280-20x66 Universal CapSense Controller. AN64846: Getting Started With CapSense CY3280-BSM Simple Button Module Kit consists of ten AN2397: CapSense Data Viewing Tools CapSense buttons and ten LEDs. This module connects to Technical Reference Manual (TRM): any CY3280 Universal CapSense Controller Board, including CY3280-20x66 Universal CapSense Controller. CY8CPLC20, CY8CLED16P01, CY8C29x66, CY8C27x43, CY8C24x94, CY8C24x23, CY8C24x23A, CY8C22x13, The CY3217-MiniProg1 and CY8CKIT-002 PSoC MiniProg3 CY8C21x34, CY8C21x34B, CY8C21x23, CY7C64215, device provides an interface for flash programming. CY7C603xx, CY8CNP1xx, and CYWUSB6953 PSoC Pro- grammable System-on-Chip TRM PSoC Designer PSoC Designer is a free Windows-based Integrated Design Environment (IDE). It enables concurrent hardware and firmware design of systems based on CapSense (see Figure 1). With PSoC Designer, you can: 1. Drag and drop User Modules to build your hardware system 3. Configure User Module design in the main design workspace 4. Explore the library of user modules 2. Codesign your application firmware with the PSoC hardware, 5. Review user module datasheets using the PSoC Designer IDE C compiler Figure 1. PSoC Designer Features 1 2 3 4 5 Document Number: 38-12018 Rev. AM Page 2 of 72