CY8C27143/CY8C27243 CY8C27443/CY8C27543 CY8C27643 PSoC Programmable System-on-Chip PSoC Programmable System-on-Chip Additional system resources Features 2 I C slave, master, and multi-master to 400 kHz Powerful Harvard-architecture processor Watchdog and sleep timers M8C processor speeds up to 24 MHz User-configurable low-voltage detection (LVD) 8 8 multiply, 32-bit accumulate Integrated supervisory circuit Low power at high speed On-chip precision voltage reference Operating voltage: 3.0 V to 5.25 V Complete development tools Operating voltages down to 1.0 V using on-chip switch mode Free development software (PSoC Designer) pump (SMP) Full-featured, in-circuit emulator (ICE) and programmer Industrial temperature range: 40 C to +85 C Full-speed emulation Advanced peripherals (PSoC blocks) Complex breakpoint structure Twelve rail-to-rail analog PSoC blocks provide: 128 KB trace memory Up to 14-bit analog-to-digital converters (ADCs) Up to 9-bit digital-to-analog converters (DACs) Logic Block Diagram Programmable gain amplifiers (PGAs) Programmable filters and comparators Analog Eight digital PSoC blocks provide: Port 5 Port 4 Port 3 Port 2 Port 1 Port 0 Drivers 8- to 32-bit timers and counters, 8- and 16-bit pulse-width PSoC modulators (PWMs) CORE Cyclical redundancy check (CRC) and pseudo random System Bus sequence (PRS) modules Up to two full-duplex universal asynchronous receiver transmitters (UARTs) Global Digital Interconnect Global Analog Interconnect Multiple serial peripheral interface (SPI)masters or slaves SRAM SROM Flash 16 KB Connectable to all general-purpose I/O (GPIO) pins 256 Bytes Complex peripherals by combining blocks Sleep and CPU Core (M8C) Interrupt Watchdog Controller Precision, programmable clocking Internal 2.5% 24- / 48-MHz main oscillator Multiple Clock Sources 24- / 48-MHz with optional 32 kHz crystal (Includes IMO, ILO, PLL, and ECO) Optional external oscillator up to 24 MHz Internal oscillator for watchdog and sleep DIGITAL SYSTEM ANALOG SYSTEM Flexible on-chip memory Analog Ref. 16 KB flash program storage 50,000 erase/write cycles Digital Analog 256-bytes SRAM data storage Block Block In-system serial programming (ISSP) Array Array Analog Partial flash updates Input Muxing Flexible protection modes Electronically erasable programmable read only memory (EEPROM) emulation in flash Programmable pin configurations POR and LVD Internal Switch 25-mA sink, 10-mA source on all GPIOs Digital Multiply 2 Decimator I C Voltage Mode Clocks Accum. Pull-up, pull-down, high-Z, strong, or open-drain drive modes System Resets Ref. Pump on all GPIOs SYSTEM RESOURCES Eight standard analog inputs on GPIO, plus four additional analog inputs with restricted routing Four 30-mA analog outputs on GPIOs Configurable interrupt on all GPIOs Errata: For information on silicon errata, see Errata on page 61. Details include trigger conditions, devices affected, and proposed workaround. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-12012 Rev. AD Revised January 4, 2018 CY8C27143/CY8C27243 CY8C27443/CY8C27543 CY8C27643 Note: For CY8C27X43 devices related Development Kits please More Information click here. Cypress provides a wealth of data at www.cypress.com to help The MiniProg1 and MiniProg3 devices provide interfaces for you to select the right PSoC device for your design, and to help flash programming and debug. you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the PSoC Designer knowledge base article How to Design with PSoC 1, PowerPSoC , and PLC KBA88292. Following is an PSoC Designer is a free Windows-based Integrated Design abbreviated list for PSoC 1: Environment (IDE). Develop your applications using a library of pre-characterized analog and digital peripherals in a Overview: PSoC Portfolio, PSoC Roadmap drag-and-drop design environment. Then, customize your design leveraging the dynamically generated API libraries of Product Selectors: PSoC 1, PSoC 3, PSoC 4, PSoC 5LP code. Figure 1 shows PSoC Designer windows. Note: This is not In addition, PSoC Designer includes a device selection tool. the default view. 1. Global Resources all device hardware settings. Application notes: Cypress offers a large number of PSoC 2. Parameters the parameters of the currently selected User application notes covering a broad range of topics, from basic Modules. to advanced level. Recommended application notes for getting started with PSoC 1 are: 3. Pinout information related to device pins. Getting Started with PSoC 1 AN75320. 4. Chip-Level Editor a diagram of the resources available on PSoC 1 - Getting Started with GPIO AN2094. the selected chip. PSoC 1 Analog Structure and Configuration AN74170. 5. Datasheet the datasheet for the currently selected UM PSoC 1 Switched Capacitor Analog Blocks AN2041. 6. User Modules all available User Modules for the selected Selecting Analog Ground and Reference AN2219. device. Note: For CY8C27X43 devices related Application note please 7. Device Resource Meter device resource usage for the click here. current project configuration. Development Kits: 8. Workspace a tree level diagram of files associated with the CY3210-PSoCEval1 supports all PSoC 1 Mixed-Signal Array project. families, including automotive, except CY8C25/26xxx 9. Output output from project build and debug operations. devices. The kit includes an LCD module, potentiometer, LEDs, and breadboarding space. Note: For detailed information on PSoC Designer, go to CY3214-PSoCEvalUSB features a development board for PSoC Designer > Help > Documentation > the CY8C24x94 PSoC device. Special features of the board Designer Specific Documents > IDE User Guide. include USB and CapSense development and debugging support. Figure 1. PSoC Designer Layout Document Number: 38-12012 Rev. AD Page 2 of 69